DE69305473T2 - Analog-digitalkodiererschaltung mit Nullpunktabgleich - Google Patents
Analog-digitalkodiererschaltung mit NullpunktabgleichInfo
- Publication number
- DE69305473T2 DE69305473T2 DE69305473T DE69305473T DE69305473T2 DE 69305473 T2 DE69305473 T2 DE 69305473T2 DE 69305473 T DE69305473 T DE 69305473T DE 69305473 T DE69305473 T DE 69305473T DE 69305473 T2 DE69305473 T2 DE 69305473T2
- Authority
- DE
- Germany
- Prior art keywords
- analog
- zero point
- point adjustment
- encoder circuit
- digital encoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0612—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic over the full range of the converter, e.g. for correcting differential non-linearity
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
- H03M1/0607—Offset or drift compensation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR9211451A FR2696300B1 (fr) | 1992-09-25 | 1992-09-25 | Circuit de codage analogique-numérique à compensation automatique du décalage du zéro. |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69305473D1 DE69305473D1 (de) | 1996-11-21 |
DE69305473T2 true DE69305473T2 (de) | 1997-02-27 |
Family
ID=9433894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69305473T Expired - Fee Related DE69305473T2 (de) | 1992-09-25 | 1993-09-10 | Analog-digitalkodiererschaltung mit Nullpunktabgleich |
Country Status (7)
Country | Link |
---|---|
US (1) | US5424738A (de) |
EP (1) | EP0589749B1 (de) |
JP (1) | JPH06216773A (de) |
KR (1) | KR940008274A (de) |
CA (1) | CA2106268A1 (de) |
DE (1) | DE69305473T2 (de) |
FR (1) | FR2696300B1 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1011899A (ja) * | 1996-06-27 | 1998-01-16 | Canon Inc | デジタル信号処理装置 |
US5793318A (en) * | 1997-02-05 | 1998-08-11 | Hewlett-Packard Company | System for preventing of crosstalk between a raw digital output signal and an analog input signal in an analog-to-digital converter |
KR100492988B1 (ko) * | 1997-10-28 | 2005-09-16 | 삼성전자주식회사 | 아날로그-디지탈변환회로 |
KR100284285B1 (ko) * | 1998-11-26 | 2001-03-02 | 김영환 | 싸이클릭 아날로그/디지털 변환기 |
US6177901B1 (en) | 1999-02-03 | 2001-01-23 | Li Pan | High accuracy, high speed, low power analog-to-digital conversion method and circuit |
EP2541213B1 (de) * | 2011-07-01 | 2017-03-08 | EM Microelectronic-Marin SA | Verfahren zur Reduzierung der Nichtlinearität beim Messen eines physikalischen Parameters, und elektronischer Schaltkreis zu dessen Umsetzung |
US8730074B1 (en) * | 2013-01-14 | 2014-05-20 | Intel Corporation | Successive approximation analog-to-digital conversion with gain control for tuners |
DE102014014449A1 (de) * | 2014-09-26 | 2016-03-31 | Giesecke & Devrient Gmbh | Verfahren und Sicherheitsmodul zum Empfang von zwei Signalen |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3982241A (en) * | 1974-08-19 | 1976-09-21 | Digital Equipment Corporation | Self-zeroing analog-to-digital conversion system |
FR2396463A1 (fr) * | 1977-06-30 | 1979-01-26 | Ibm France | Circuit pour compenser les decalages du zero dans les dispositifs analogiques et application de ce circuit a un convertisseur analogique-numerique |
DE3031592A1 (de) * | 1980-08-21 | 1982-03-18 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum nullpunktabgleich des durch einen operationsverstaerker realisierten analogwertvergleichers eines unter verwendung eines digital-analog-wandlers nach dem iterativprinzip arbeitenden analog-digital-wandlers, insbesondere bei dessen zugehoerigkeit zu einer einrichtung zur analog-digital-wandlung und umgekehrt zur digital-analog-wandlung (codec) |
US4390864A (en) * | 1981-05-11 | 1983-06-28 | Ormond A Newman | Analog to digital converter without zero drift |
US4608553A (en) * | 1981-05-11 | 1986-08-26 | Ormond A Neuman | Analog to digital converter without zero drift |
JPS61292067A (ja) * | 1985-06-19 | 1986-12-22 | Mitsubishi Electric Corp | 電力量測定方法 |
JPS6416024A (en) * | 1987-07-09 | 1989-01-19 | Matsushita Electric Ind Co Ltd | Offset correction type analog/digital converter |
USRE34428E (en) * | 1988-12-02 | 1993-11-02 | John Fluke Mfg. Co., Inc. | Analog-to-digital converter with offset voltage polarity inversion |
US5101395A (en) * | 1990-06-11 | 1992-03-31 | International Business Machines Corporation | Data detection employing high-speed baseline tracking compensation |
JP2924373B2 (ja) * | 1990-11-02 | 1999-07-26 | 日本電気株式会社 | A/d変換回路 |
JP3568327B2 (ja) * | 1996-06-26 | 2004-09-22 | 日本合成化学工業株式会社 | パージング剤 |
-
1992
- 1992-09-25 FR FR9211451A patent/FR2696300B1/fr not_active Expired - Fee Related
-
1993
- 1993-09-10 DE DE69305473T patent/DE69305473T2/de not_active Expired - Fee Related
- 1993-09-10 EP EP93402205A patent/EP0589749B1/de not_active Expired - Lifetime
- 1993-09-15 CA CA002106268A patent/CA2106268A1/fr not_active Abandoned
- 1993-09-21 US US08/124,208 patent/US5424738A/en not_active Expired - Fee Related
- 1993-09-24 KR KR1019930019625A patent/KR940008274A/ko not_active Application Discontinuation
- 1993-09-24 JP JP5238285A patent/JPH06216773A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0589749A1 (de) | 1994-03-30 |
FR2696300B1 (fr) | 1994-11-18 |
US5424738A (en) | 1995-06-13 |
CA2106268A1 (fr) | 1994-03-26 |
JPH06216773A (ja) | 1994-08-05 |
KR940008274A (ko) | 1994-04-29 |
EP0589749B1 (de) | 1996-10-16 |
DE69305473D1 (de) | 1996-11-21 |
FR2696300A1 (fr) | 1994-04-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |