DE69232746D1 - Halbleiteranordnung und Verfahren zur Erhöhung der Durchbruchspannung einer Halbleiteranordnung - Google Patents

Halbleiteranordnung und Verfahren zur Erhöhung der Durchbruchspannung einer Halbleiteranordnung

Info

Publication number
DE69232746D1
DE69232746D1 DE69232746T DE69232746T DE69232746D1 DE 69232746 D1 DE69232746 D1 DE 69232746D1 DE 69232746 T DE69232746 T DE 69232746T DE 69232746 T DE69232746 T DE 69232746T DE 69232746 D1 DE69232746 D1 DE 69232746D1
Authority
DE
Germany
Prior art keywords
semiconductor arrangement
increasing
breakdown voltage
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69232746T
Other languages
English (en)
Other versions
DE69232746T2 (de
Inventor
Yoshiro Baba
Shunichi Hiraki
Akihiko Osawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69232746D1 publication Critical patent/DE69232746D1/de
Application granted granted Critical
Publication of DE69232746T2 publication Critical patent/DE69232746T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/901—MOSFET substrate bias

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)
DE69232746T 1991-05-13 1992-05-13 Halbleiteranordnung und Verfahren zur Erhöhung der Durchbruchspannung einer Halbleiteranordnung Expired - Fee Related DE69232746T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3137285A JP2654268B2 (ja) 1991-05-13 1991-05-13 半導体装置の使用方法

Publications (2)

Publication Number Publication Date
DE69232746D1 true DE69232746D1 (de) 2002-10-02
DE69232746T2 DE69232746T2 (de) 2003-04-03

Family

ID=15195114

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69232746T Expired - Fee Related DE69232746T2 (de) 1991-05-13 1992-05-13 Halbleiteranordnung und Verfahren zur Erhöhung der Durchbruchspannung einer Halbleiteranordnung

Country Status (5)

Country Link
US (1) US5554872A (de)
EP (1) EP0513764B1 (de)
JP (1) JP2654268B2 (de)
KR (1) KR950014684B1 (de)
DE (1) DE69232746T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE500814C2 (sv) * 1993-01-25 1994-09-12 Ericsson Telefon Ab L M Halvledaranordning i ett tunt aktivt skikt med hög genombrottsspänning
DE69528944T2 (de) * 1994-09-16 2003-09-04 Toshiba Kawasaki Kk Halbleiteranordnung mit hoher Durchbruchspannung und mit einer vergrabenen MOS-Gatestruktur
US5631491A (en) * 1994-09-27 1997-05-20 Fuji Electric Co., Ltd. Lateral semiconductor device and method of fixing potential of the same
SE515867C2 (sv) * 1995-04-13 2001-10-22 Ericsson Telefon Ab L M Bipolär SOI-transistor
JP2822961B2 (ja) * 1995-12-14 1998-11-11 日本電気株式会社 半導体装置
JPH10150204A (ja) * 1996-09-19 1998-06-02 Toshiba Corp 半導体装置およびその製造方法
US6211551B1 (en) 1997-06-30 2001-04-03 Matsushita Electric Works, Ltd. Solid-state relay
US6011297A (en) * 1997-07-18 2000-01-04 Advanced Micro Devices,Inc. Use of multiple slots surrounding base region of a bipolar junction transistor to increase cumulative breakdown voltage
US5912501A (en) * 1997-07-18 1999-06-15 Advanced Micro Devices, Inc. Elimination of radius of curvature effects of p-n junction avalanche breakdown using slots
US5859469A (en) * 1997-07-18 1999-01-12 Advanced Micro Devices, Inc. Use of tungsten filled slots as ground plane in integrated circuit structure
US6150697A (en) * 1998-04-30 2000-11-21 Denso Corporation Semiconductor apparatus having high withstand voltage
TW426998B (en) * 1998-05-04 2001-03-21 United Microelectronics Corp Layer-stacked integrated circuit structure
US6696707B2 (en) * 1999-04-23 2004-02-24 Ccp. Clare Corporation High voltage integrated switching devices on a bonded and trenched silicon substrate
JP2002043319A (ja) * 2000-07-19 2002-02-08 Mitsubishi Electric Corp 半導体装置
JP3510576B2 (ja) 2000-09-28 2004-03-29 Ｎｅｃエレクトロニクス株式会社 半導体装置及びその製造方法
JP3415581B2 (ja) 2000-11-29 2003-06-09 Ｎｅｃエレクトロニクス株式会社 半導体装置
KR100393199B1 (ko) * 2001-01-15 2003-07-31 페어차일드코리아반도체 주식회사 높은 브레이크다운 전압을 갖는 고전압 반도체 소자 및 그제조방법
JP4020195B2 (ja) * 2002-12-19 2007-12-12 三菱電機株式会社 誘電体分離型半導体装置の製造方法
JP2004207418A (ja) * 2002-12-25 2004-07-22 Nippon Inter Electronics Corp 半導体装置及びその製造方法
JP4983333B2 (ja) * 2007-03-27 2012-07-25 株式会社デンソー 半導体装置
JP5167323B2 (ja) * 2010-09-30 2013-03-21 トヨタ自動車株式会社 半導体装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5516456A (en) * 1978-07-24 1980-02-05 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit
US4232328A (en) * 1978-12-20 1980-11-04 Bell Telephone Laboratories, Incorporated Dielectrically-isolated integrated circuit complementary transistors for high voltage use
US4242697A (en) * 1979-03-14 1980-12-30 Bell Telephone Laboratories, Incorporated Dielectrically isolated high voltage semiconductor devices
US4587656A (en) * 1979-12-28 1986-05-06 At&T Bell Laboratories High voltage solid-state switch
US4626879A (en) * 1982-12-21 1986-12-02 North American Philips Corporation Lateral double-diffused MOS transistor devices suitable for source-follower applications
US4639761A (en) * 1983-12-16 1987-01-27 North American Philips Corporation Combined bipolar-field effect transistor resurf devices
US4593458A (en) * 1984-11-02 1986-06-10 General Electric Company Fabrication of integrated circuit with complementary, dielectrically-isolated, high voltage semiconductor devices
US5448100A (en) * 1985-02-19 1995-09-05 Harris Corporation Breakdown diode structure
JPS6386555A (ja) * 1986-09-30 1988-04-16 Toshiba Corp 半導体装置
JPS63157475A (ja) * 1986-12-20 1988-06-30 Toshiba Corp 半導体装置及びその製造方法
JPS63205926A (ja) * 1987-02-23 1988-08-25 Nippon Telegr & Teleph Corp <Ntt> 誘電体分離基板の製造方法
US5241210A (en) * 1987-02-26 1993-08-31 Kabushiki Kaisha Toshiba High breakdown voltage semiconductor device
BE1000432A6 (fr) * 1987-04-03 1988-12-06 Centre Rech Metallurgique Procede pour ameliorer la resistance a la corrosion d'une barre d'armature en acier trempe et auto-revenu.
JPS6473669A (en) * 1987-09-14 1989-03-17 Fujitsu Ltd Semiconductor integrated circuit
JPH02327A (ja) * 1987-10-09 1990-01-05 Fujitsu Ltd 半導体装置
JPH0615308B2 (ja) * 1988-07-04 1994-03-02 日産自動車株式会社 パワートレーンの総合制御装置
ES2152919T3 (es) * 1990-01-08 2001-02-16 Harris Corp Procedimiento de utilizacion de un dispositivo semiconductor que comprende un sustrato que tiene un islote semiconductor dielectricamente aislado.
US5113236A (en) * 1990-12-14 1992-05-12 North American Philips Corporation Integrated circuit device particularly adapted for high voltage applications
US5362979A (en) * 1991-02-01 1994-11-08 Philips Electronics North America Corporation SOI transistor with improved source-high performance

Also Published As

Publication number Publication date
KR920022439A (ko) 1992-12-19
DE69232746T2 (de) 2003-04-03
JPH04336446A (ja) 1992-11-24
JP2654268B2 (ja) 1997-09-17
EP0513764A3 (en) 1994-06-22
EP0513764A2 (de) 1992-11-19
EP0513764B1 (de) 2002-08-28
KR950014684B1 (ko) 1995-12-13
US5554872A (en) 1996-09-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee