DE69224951D1 - Halbleiter-Speichereinrichtung mit Möglichkeit zum Wechsel der Output-Organisation unter hoher Geschwindigkeit - Google Patents
Halbleiter-Speichereinrichtung mit Möglichkeit zum Wechsel der Output-Organisation unter hoher GeschwindigkeitInfo
- Publication number
- DE69224951D1 DE69224951D1 DE69224951T DE69224951T DE69224951D1 DE 69224951 D1 DE69224951 D1 DE 69224951D1 DE 69224951 T DE69224951 T DE 69224951T DE 69224951 T DE69224951 T DE 69224951T DE 69224951 D1 DE69224951 D1 DE 69224951D1
- Authority
- DE
- Germany
- Prior art keywords
- possibility
- changing
- storage device
- high speed
- semiconductor storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3241043A JP2743653B2 (ja) | 1991-09-20 | 1991-09-20 | 半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69224951D1 true DE69224951D1 (de) | 1998-05-07 |
DE69224951T2 DE69224951T2 (de) | 1998-07-30 |
Family
ID=17068465
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69224951T Expired - Fee Related DE69224951T2 (de) | 1991-09-20 | 1992-09-17 | Halbleiter-Speichereinrichtung mit Möglichkeit zum Wechsel der Output-Organisation unter hoher Geschwindigkeit |
Country Status (5)
Country | Link |
---|---|
US (1) | US5280456A (de) |
EP (1) | EP0533578B1 (de) |
JP (1) | JP2743653B2 (de) |
KR (1) | KR960001787B1 (de) |
DE (1) | DE69224951T2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0973778A (ja) * | 1995-09-01 | 1997-03-18 | Texas Instr Japan Ltd | アドレスアクセスパスのコントロール回路 |
US5715197A (en) | 1996-07-29 | 1998-02-03 | Xilinx, Inc. | Multiport RAM with programmable data port configuration |
KR100388225B1 (ko) * | 1996-11-12 | 2003-10-04 | 주식회사 하이닉스반도체 | 센서앰프 출력 조정회로 |
JP4112729B2 (ja) | 1999-02-16 | 2008-07-02 | 株式会社ルネサステクノロジ | 半導体装置 |
KR100490657B1 (ko) * | 2000-12-30 | 2005-05-24 | 주식회사 하이닉스반도체 | 메모리 출력능력의 가변제어 장치 및 방법 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55150179A (en) * | 1979-05-04 | 1980-11-21 | Fujitsu Ltd | Semiconductor memory unit |
JPS61992A (ja) * | 1984-06-14 | 1986-01-06 | Matsushita Electric Ind Co Ltd | 半導体メモリ |
JPS629586A (ja) * | 1985-07-08 | 1987-01-17 | Oki Electric Ind Co Ltd | 半導体ランダムアクセスメモリ装置 |
JPH087998B2 (ja) * | 1985-11-21 | 1996-01-29 | ソニー株式会社 | メモリ−回路 |
JPH0697560B2 (ja) * | 1987-11-19 | 1994-11-30 | 三菱電機株式会社 | 半導体記憶装置 |
JPH02168496A (ja) * | 1988-09-14 | 1990-06-28 | Kawasaki Steel Corp | 半導体メモリ回路 |
EP0384673B1 (de) * | 1989-02-18 | 1995-05-24 | Sony Corporation | Speicheranordnungen |
EP0385389B1 (de) * | 1989-02-27 | 1995-06-28 | Nec Corporation | Integrierte Halbleiterspeicherschaltung mit Möglichkeit zum Maskieren des Schreibens im Speicher |
JPH02282990A (ja) * | 1989-04-25 | 1990-11-20 | Fujitsu Ltd | 半導体記憶装置 |
JP2603145B2 (ja) * | 1990-03-09 | 1997-04-23 | 三菱電機株式会社 | 半導体集積回路装置 |
-
1991
- 1991-09-20 JP JP3241043A patent/JP2743653B2/ja not_active Expired - Fee Related
-
1992
- 1992-09-15 US US07/944,953 patent/US5280456A/en not_active Expired - Lifetime
- 1992-09-17 DE DE69224951T patent/DE69224951T2/de not_active Expired - Fee Related
- 1992-09-17 EP EP92402564A patent/EP0533578B1/de not_active Expired - Lifetime
- 1992-09-21 KR KR92017206A patent/KR960001787B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE69224951T2 (de) | 1998-07-30 |
JPH0581865A (ja) | 1993-04-02 |
EP0533578A2 (de) | 1993-03-24 |
EP0533578A3 (de) | 1995-04-12 |
KR960001787B1 (en) | 1996-02-05 |
JP2743653B2 (ja) | 1998-04-22 |
KR930006726A (ko) | 1993-04-21 |
US5280456A (en) | 1994-01-18 |
EP0533578B1 (de) | 1998-04-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |