DE69125121D1 - Keramisches Substrat für elektronische Schaltung und Verfahren zu dessen Herstellung - Google Patents

Keramisches Substrat für elektronische Schaltung und Verfahren zu dessen Herstellung

Info

Publication number
DE69125121D1
DE69125121D1 DE69125121T DE69125121T DE69125121D1 DE 69125121 D1 DE69125121 D1 DE 69125121D1 DE 69125121 T DE69125121 T DE 69125121T DE 69125121 T DE69125121 T DE 69125121T DE 69125121 D1 DE69125121 D1 DE 69125121D1
Authority
DE
Germany
Prior art keywords
production
electronic circuit
ceramic substrate
ceramic
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69125121T
Other languages
English (en)
Other versions
DE69125121T2 (de
Inventor
Yoichiro Yokotani
Hamae Ando
Koichi Kugimiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE69125121D1 publication Critical patent/DE69125121D1/de
Publication of DE69125121T2 publication Critical patent/DE69125121T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H01L21/4807Ceramic parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894Materials of the insulating layers or coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701Low temperature co-fired ceramic [LTCC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • H05K1/092Dispersed materials, e.g. conductive pastes or inks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00Stock material or miscellaneous articles
    • Y10S428/901Printed circuit
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24926Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including ceramic, glass, porcelain or quartz layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Ceramic Products (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE69125121T 1990-12-21 1991-12-20 Keramisches Substrat für elektronische Schaltung und Verfahren zu dessen Herstellung Expired - Fee Related DE69125121T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2404856A JPH04221888A (ja) 1990-12-21 1990-12-21 セラミック配線基板とその製造方法

Publications (2)

Publication Number Publication Date
DE69125121D1 true DE69125121D1 (de) 1997-04-17
DE69125121T2 DE69125121T2 (de) 1997-06-19

Family

ID=18514511

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69125121T Expired - Fee Related DE69125121T2 (de) 1990-12-21 1991-12-20 Keramisches Substrat für elektronische Schaltung und Verfahren zu dessen Herstellung

Country Status (4)

Country Link
US (1) US5512353A (de)
EP (1) EP0492518B1 (de)
JP (1) JPH04221888A (de)
DE (1) DE69125121T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5618611A (en) * 1994-06-30 1997-04-08 Lucent Technologies Inc. Metallization of ferrites through surface reduction
EP0732777A3 (de) * 1995-03-14 1997-06-18 At & T Corp Elektromagnetische Interferenz unterdrückende Verbinderleiste
US5603147A (en) * 1995-06-07 1997-02-18 Microelectronic Packaging, Inc. Method of making a high energy multilayer ceramic capacitor
JPH09283654A (ja) * 1996-04-17 1997-10-31 Nec Corp ガラスセラミック基板とその製造方法
JP3077056B2 (ja) * 1996-09-12 2000-08-14 株式会社村田製作所 積層型電子部品
JP2000357624A (ja) * 1999-06-16 2000-12-26 Murata Mfg Co Ltd 積層セラミック電子部品
US6801422B2 (en) 1999-12-28 2004-10-05 Intel Corporation High performance capacitor
US6724611B1 (en) * 2000-03-29 2004-04-20 Intel Corporation Multi-layer chip capacitor
JP4225033B2 (ja) * 2001-12-14 2009-02-18 株式会社日本自動車部品総合研究所 セラミック積層体とその製造方法
JP4131694B2 (ja) * 2003-10-06 2008-08-13 三洋電機株式会社 積層セラミックス基板及びその製造方法
JP2008030992A (ja) * 2006-07-28 2008-02-14 Canon Inc 基板の製造方法、配線基板の製造方法、配線基板、電子デバイス、電子源および画像表示装置
US9490055B2 (en) * 2011-10-31 2016-11-08 Murata Manufacturing Co., Ltd. Ceramic electronic component and manufacturing method thereof

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3075860A (en) * 1958-08-12 1963-01-29 Owens Illinois Glass Co Method of adhering metal to a glass base
JPS5111793A (en) * 1974-07-18 1976-01-30 Kojin Kk Shinkina 5*100 jiokiso 33 arukokishimechirenamino 5h*10h** piroro * 1*22b * isokinorinruino seizohoho
JPS5111795A (en) * 1974-07-18 1976-01-30 Kojin Kk Shinkina benzopirano * 2*33b * pirijinjudotaino seizohoho
JPS5126640A (ja) * 1974-08-30 1976-03-05 Toshiba Machine Co Ltd Sanaraihaiekinokaishuhoho
US4503090A (en) * 1983-02-23 1985-03-05 At&T Bell Laboratories Thick film resistor circuits
US4714570A (en) * 1984-07-17 1987-12-22 Matsushita Electric Industrial Co., Ltd. Conductor paste and method of manufacturing a multilayered ceramic body using the paste
JPS6231906A (ja) * 1985-07-31 1987-02-10 株式会社村田製作所 誘電体磁器組成物
JPS62142396A (ja) * 1985-12-17 1987-06-25 アルプス電気株式会社 薄膜回路基板
JPS62210613A (ja) * 1986-03-12 1987-09-16 松下電器産業株式会社 積層コンデンサ素子
JPH01258307A (ja) * 1987-12-18 1989-10-16 Showa Denko Kk 銅ペースト
JPH0728128B2 (ja) * 1988-03-11 1995-03-29 松下電器産業株式会社 セラミック多層配線基板とその製造方法
JPH071823B2 (ja) * 1988-05-20 1995-01-11 株式会社村田製作所 厚膜配線基板の製造方法
JPH0272695A (ja) * 1988-09-07 1990-03-12 Toshiba Lighting & Technol Corp 混成集積回路
JP2615977B2 (ja) * 1989-02-23 1997-06-04 松下電器産業株式会社 誘電体磁器組成物およびこれを用いた積層セラミックコンデンサとその製造方法
JPH0650701B2 (ja) * 1989-05-18 1994-06-29 松下電器産業株式会社 積層コンデンサ素子とその製造方法

Also Published As

Publication number Publication date
EP0492518A1 (de) 1992-07-01
DE69125121T2 (de) 1997-06-19
EP0492518B1 (de) 1997-03-12
JPH04221888A (ja) 1992-08-12
US5512353A (en) 1996-04-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee