DE69121967D1 - Datenbus-Klemmschaltung einer Halbleiterspeicheranordnung - Google Patents

Datenbus-Klemmschaltung einer Halbleiterspeicheranordnung

Info

Publication number
DE69121967D1
DE69121967D1 DE69121967T DE69121967T DE69121967D1 DE 69121967 D1 DE69121967 D1 DE 69121967D1 DE 69121967 T DE69121967 T DE 69121967T DE 69121967 T DE69121967 T DE 69121967T DE 69121967 D1 DE69121967 D1 DE 69121967D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
data bus
clamping circuit
bus clamping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69121967T
Other languages
English (en)
Other versions
DE69121967T2 (de
Inventor
Masahumi Miyawaki
Tamihiro Ishimura
Yoshio Ohtsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69121967D1 publication Critical patent/DE69121967D1/de
Publication of DE69121967T2 publication Critical patent/DE69121967T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
DE69121967T 1990-05-31 1991-05-24 Datenbus-Klemmschaltung einer Halbleiterspeicheranordnung Expired - Fee Related DE69121967T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2142664A JPH0438697A (ja) 1990-05-31 1990-05-31 半導体記憶装置のデータバスクランプ回路

Publications (2)

Publication Number Publication Date
DE69121967D1 true DE69121967D1 (de) 1996-10-17
DE69121967T2 DE69121967T2 (de) 1997-03-27

Family

ID=15320627

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69121967T Expired - Fee Related DE69121967T2 (de) 1990-05-31 1991-05-24 Datenbus-Klemmschaltung einer Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5091886A (de)
EP (1) EP0459314B1 (de)
JP (1) JPH0438697A (de)
KR (1) KR100203717B1 (de)
DE (1) DE69121967T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5260904A (en) * 1990-05-31 1993-11-09 Oki Electric Industry Co., Ltd. Data bus clamp circuit for a semiconductor memory device
JPH0474382A (ja) * 1990-07-17 1992-03-09 Fujitsu Ltd 半導体記憶装置
US5206550A (en) * 1991-06-20 1993-04-27 Texas Instruments, Incorporated Amplifier with actively clamped load
JPH05342872A (ja) * 1992-06-05 1993-12-24 Oki Micro Design Miyazaki:Kk 半導体記憶装置
TW223172B (en) * 1992-12-22 1994-05-01 Siemens Ag Siganl sensing circuits for memory system using dynamic gain memory cells
KR0133973B1 (ko) * 1993-02-25 1998-04-20 기다오까 다까시 반도체 기억장치
KR0158027B1 (ko) * 1993-12-29 1999-02-01 모리시다 요이치 반도체집적회로
JP3248482B2 (ja) * 1998-03-13 2002-01-21 日本電気株式会社 半導体記憶装置
AU2003295880A1 (en) * 2002-11-27 2004-06-23 University Of Toledo, The Integrated photoelectrochemical cell and system having a liquid electrolyte
US7667133B2 (en) * 2003-10-29 2010-02-23 The University Of Toledo Hybrid window layer for photovoltaic cells
WO2006110613A2 (en) * 2005-04-11 2006-10-19 The University Of Toledo Integrated photovoltaic-electrolysis cell
DE102005029872A1 (de) * 2005-06-27 2007-04-19 Infineon Technologies Ag Speicherzelle, Lesevorrichtung für die Speicherzelle sowie Speicheranordnungen mit einer derartigen Speicherzelle und Lesevorrichtung
US7417903B2 (en) * 2005-09-29 2008-08-26 Hynix Semiconductor Inc. Core voltage generator and method for generating core voltage in semiconductor memory device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6194296A (ja) * 1984-10-16 1986-05-13 Fujitsu Ltd 半導体記憶装置
US4694429A (en) * 1984-11-29 1987-09-15 Kabushiki Kaisha Toshiba Semiconductor memory device
JPS62134894A (ja) * 1985-12-06 1987-06-17 Mitsubishi Electric Corp 半導体記憶装置
US4961168A (en) * 1987-02-24 1990-10-02 Texas Instruments Incorporated Bipolar-CMOS static random access memory device with bit line bias control

Also Published As

Publication number Publication date
EP0459314A2 (de) 1991-12-04
EP0459314B1 (de) 1996-09-11
DE69121967T2 (de) 1997-03-27
KR100203717B1 (ko) 1999-06-15
US5091886A (en) 1992-02-25
KR910020728A (ko) 1991-12-20
JPH0438697A (ja) 1992-02-07
EP0459314A3 (en) 1992-10-28

Similar Documents

Publication Publication Date Title
KR890015268A (ko) 반도체 기억회로
ITMI910107A0 (it) Dispositivo di memoria a semiconduttore
DE69123666D1 (de) Halbleiterspeicheranordnung
DE69123379T2 (de) Halbleiterspeichervorrichtung
DE69121801T2 (de) Halbleiterspeicheranordnung
DE69123409D1 (de) Halbleiterspeicherschaltung
DE69121967D1 (de) Datenbus-Klemmschaltung einer Halbleiterspeicheranordnung
DE69127317D1 (de) Halbleiterspeicherschaltung
KR900012267A (ko) 반도체 메모리용 센스회로
DE69119617D1 (de) Halbleiterspeicherschaltung
DE69123294D1 (de) Halbleiterspeicheranordnung
DE69322318T2 (de) Halbleiterspeicherschaltung
DE69119636T2 (de) Halbleiterspeicherschaltung
DE69122293T2 (de) Halbleiterspeicheranordnung
DE69221192D1 (de) Halbleiterspeicherschaltung
DE69331210D1 (de) Integriertes Speicherschaltungsgerät
DE69327858D1 (de) Halbleiterspeichergerät mit einer Prüfschaltung
DE69128676T2 (de) Halbleiterspeicheranordnung mit einer Wortleitungstreiberschaltung
DE69122909D1 (de) Halbleiterspeicheranordnung
DE69119141T2 (de) Halbleiterspeicheranordnung
DE69121804T2 (de) Halbleiterspeicheranordnung
DE69119252D1 (de) Halbleiterspeicheranordnung
DE69121366T2 (de) Halbleiterspeicheranordnung
KR940001895U (ko) 반도체 메모리회로
IT9021961A0 (it) Dispositivo di memoria a semicondutori

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee