DE69116471D1 - Aktive Einrichtung mit oxydischem Supraleiter und deren Herstellungsprozess - Google Patents

Aktive Einrichtung mit oxydischem Supraleiter und deren Herstellungsprozess

Info

Publication number
DE69116471D1
DE69116471D1 DE69116471T DE69116471T DE69116471D1 DE 69116471 D1 DE69116471 D1 DE 69116471D1 DE 69116471 T DE69116471 T DE 69116471T DE 69116471 T DE69116471 T DE 69116471T DE 69116471 D1 DE69116471 D1 DE 69116471D1
Authority
DE
Germany
Prior art keywords
manufacturing process
active device
oxide superconductor
superconductor
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69116471T
Other languages
English (en)
Other versions
DE69116471T2 (de
Inventor
Nobuo Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69116471D1 publication Critical patent/DE69116471D1/de
Application granted granted Critical
Publication of DE69116471T2 publication Critical patent/DE69116471T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/01—Manufacture or treatment
    • H10N60/0268—Manufacture or treatment of devices comprising copper oxide
    • H10N60/0296—Processes for depositing or forming copper oxide superconductor layers
    • H10N60/0576—Processes for depositing or forming copper oxide superconductor layers characterised by the substrate
    • H10N60/0632—Intermediate layers, e.g. for growth control
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y10S505/702—Josephson junction present
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/70—High TC, above 30 k, superconducting device, article, or structured stock
    • Y10S505/701—Coated or thin film device, i.e. active or passive
    • Y10S505/703—Microelectronic device with superconducting conduction line
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/729—Growing single crystal, e.g. epitaxy, bulk
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S505/00—Superconductor technology: apparatus, material, process
    • Y10S505/725—Process of making or treating high tc, above 30 k, superconducting shaped material, article, or device
    • Y10S505/73—Vacuum treating or coating
    • Y10S505/732—Evaporative coating with superconducting material

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Recrystallisation Techniques (AREA)
DE69116471T 1990-08-09 1991-08-06 Aktive Einrichtung mit oxydischem Supraleiter und deren Herstellungsprozess Expired - Lifetime DE69116471T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP02212385A JP3096050B2 (ja) 1990-08-09 1990-08-09 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69116471D1 true DE69116471D1 (de) 1996-02-29
DE69116471T2 DE69116471T2 (de) 1996-05-30

Family

ID=16621708

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69116471T Expired - Lifetime DE69116471T2 (de) 1990-08-09 1991-08-06 Aktive Einrichtung mit oxydischem Supraleiter und deren Herstellungsprozess

Country Status (5)

Country Link
US (1) US5231077A (de)
EP (1) EP0470806B1 (de)
JP (1) JP3096050B2 (de)
KR (1) KR940003745B1 (de)
DE (1) DE69116471T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2700065B1 (fr) * 1992-12-28 1995-02-10 Commissariat Energie Atomique Procédé de fabrication d'accéléromètres utilisant la technologie silicium sur isolant.
US5572060A (en) * 1995-02-01 1996-11-05 Southern Methodist University Uncooled YBaCuO thin film infrared detector
US5821598A (en) * 1995-02-01 1998-10-13 Research Corporation Technologies, Inc. Uncooled amorphous YBaCuO thin film infrared detector
US6329703B1 (en) * 1998-02-25 2001-12-11 Infineon Technologies Ag Contact between a monocrystalline silicon region and a polycrystalline silicon structure and method for producing such a contact
KR100739098B1 (ko) * 2005-12-21 2007-07-12 주식회사 실트론 실리콘 웨이퍼 및 그 제조 방법

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4749660A (en) * 1986-11-26 1988-06-07 American Telephone And Telegraph Company, At&T Bell Laboratories Method of making an article comprising a buried SiO2 layer
US5017551A (en) * 1987-05-04 1991-05-21 Eastman Kodak Company Barrier layer containing conductive articles
CA1336566C (en) * 1987-05-31 1995-08-08 Naoji Fujimori Superconducting thin film
JPH0244781A (ja) * 1988-08-05 1990-02-14 Canon Inc 超伝導素子およびその製造方法
US5047390A (en) * 1988-10-03 1991-09-10 Matsushita Electric Industrial Co., Ltd. Josephson devices and process for manufacturing the same
US4970395A (en) * 1988-12-23 1990-11-13 Honeywell Inc. Wavelength tunable infrared detector based upon super-schottky or superconductor-insulator-superconductor structures employing high transition temperature superconductors
JPH02212306A (ja) * 1989-02-14 1990-08-23 Seiko Epson Corp 酸化物超伝導薄膜

Also Published As

Publication number Publication date
EP0470806B1 (de) 1996-01-17
JP3096050B2 (ja) 2000-10-10
KR920005397A (ko) 1992-03-28
JPH0494129A (ja) 1992-03-26
DE69116471T2 (de) 1996-05-30
EP0470806A2 (de) 1992-02-12
EP0470806A3 (en) 1992-06-10
US5231077A (en) 1993-07-27
KR940003745B1 (ko) 1994-04-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: SHARP K.K., OSAKA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE