DE69022864D1 - Komplementäre Transistorstruktur und deren Herstellungsverfahren. - Google Patents

Komplementäre Transistorstruktur und deren Herstellungsverfahren.

Info

Publication number
DE69022864D1
DE69022864D1 DE69022864T DE69022864T DE69022864D1 DE 69022864 D1 DE69022864 D1 DE 69022864D1 DE 69022864 T DE69022864 T DE 69022864T DE 69022864 T DE69022864 T DE 69022864T DE 69022864 D1 DE69022864 D1 DE 69022864D1
Authority
DE
Germany
Prior art keywords
manufacturing process
transistor structure
complementary transistor
complementary
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69022864T
Other languages
English (en)
Other versions
DE69022864T2 (de
Inventor
David L Harame
Gary L Patton
Johannes M C Stork
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69022864D1 publication Critical patent/DE69022864D1/de
Publication of DE69022864T2 publication Critical patent/DE69022864T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0826—Combination of vertical complementary transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
DE69022864T 1989-03-06 1990-01-15 Komplementäre Transistorstruktur und deren Herstellungsverfahren. Expired - Fee Related DE69022864T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/319,374 US4951115A (en) 1989-03-06 1989-03-06 Complementary transistor structure and method for manufacture

Publications (2)

Publication Number Publication Date
DE69022864D1 true DE69022864D1 (de) 1995-11-16
DE69022864T2 DE69022864T2 (de) 1996-05-30

Family

ID=23241980

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69022864T Expired - Fee Related DE69022864T2 (de) 1989-03-06 1990-01-15 Komplementäre Transistorstruktur und deren Herstellungsverfahren.

Country Status (4)

Country Link
US (1) US4951115A (de)
EP (1) EP0386413B1 (de)
JP (1) JPH0712057B2 (de)
DE (1) DE69022864T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5159424A (en) * 1988-12-10 1992-10-27 Canon Kabushiki Kaisha Semiconductor device having a high current gain and a higher ge amount at the base region than at the emitter and collector region, and photoelectric conversion apparatus using the device
US5070031A (en) * 1990-12-14 1991-12-03 Motorola, Inc. Complementary semiconductor region fabrication
KR940003589B1 (ko) * 1991-02-25 1994-04-25 삼성전자 주식회사 BiCMOS 소자의 제조 방법
JPH0574796A (ja) * 1991-05-22 1993-03-26 Honda Motor Co Ltd トランジスタ及びその製造方法
KR940005726B1 (ko) * 1991-05-30 1994-06-23 삼성전자 주식회사 BiCMOS 소자의 NPN 트랜지스터 및 그 제조방법
KR940007466B1 (ko) * 1991-11-14 1994-08-18 삼성전자 주식회사 BiCMOS 소자의 제조방법
JPH06232354A (ja) * 1992-12-22 1994-08-19 Internatl Business Mach Corp <Ibm> 静電気保護デバイス
US5930635A (en) * 1997-05-02 1999-07-27 National Semiconductor Corporation Complementary Si/SiGe heterojunction bipolar technology
FR2807567A1 (fr) * 2000-04-10 2001-10-12 St Microelectronics Sa Procede de realisation d'un transistor bipolaire
JP3976601B2 (ja) 2002-03-28 2007-09-19 株式会社ルネサステクノロジ 半導体装置の製造方法
US7012288B2 (en) * 2002-10-08 2006-03-14 Wj Communications, Inc. Heterojunction bipolar transistor having non-uniformly doped collector for improved safe-operating area
US6972237B2 (en) * 2003-12-01 2005-12-06 Chartered Semiconductor Manufacturing Ltd. Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth
US7402487B2 (en) * 2004-10-18 2008-07-22 Infineon Technologies Richmond, Lp Process for fabricating a semiconductor device having deep trench structures
US7217628B2 (en) * 2005-01-17 2007-05-15 International Business Machines Corporation High performance integrated vertical transistors and method of making the same
US8015538B2 (en) * 2006-10-11 2011-09-06 International Business Machines Corporation Design structure with a deep sub-collector, a reach-through structure and trench isolation
WO2011047455A1 (en) * 2009-10-23 2011-04-28 Arise Technologies Corporation Controlled low temperature growth of epitaxial silicon films for photovoltaic applications

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL145396B (nl) * 1966-10-21 1975-03-17 Philips Nv Werkwijze ter vervaardiging van een geintegreerde halfgeleiderinrichting en geintegreerde halfgeleiderinrichting, vervaardigd volgens de werkwijze.
US3730786A (en) * 1970-09-03 1973-05-01 Ibm Performance matched complementary pair transistors
NL166156C (nl) * 1971-05-22 1981-06-15 Philips Nv Halfgeleiderinrichting bevattende ten minste een op een halfgeleidersubstraatlichaam aangebrachte halfge- leiderlaag met ten minste een isolatiezone, welke een in de halfgeleiderlaag verzonken isolatielaag uit door plaatselijke thermische oxydatie van het half- geleidermateriaal van de halfgeleiderlaag gevormd isolerend materiaal bevat en een werkwijze voor het vervaardigen daarvan.
IT1061510B (it) * 1975-06-30 1983-04-30 Rca Corp Transistore bipolare presentante un emettitore con una elevata bassa concentrazione di impurezze e metodo di fabbricazione dello stesso
US4159915A (en) * 1977-10-25 1979-07-03 International Business Machines Corporation Method for fabrication vertical NPN and PNP structures utilizing ion-implantation
JPS54136281A (en) * 1978-04-14 1979-10-23 Toko Inc Semiconductor device and method of fabricating same
US4274891A (en) * 1979-06-29 1981-06-23 International Business Machines Corporation Method of fabricating buried injector memory cell formed from vertical complementary bipolar transistor circuits utilizing mono-poly deposition
US4425574A (en) * 1979-06-29 1984-01-10 International Business Machines Corporation Buried injector memory cell formed from vertical complementary bipolar transistor circuits and method of fabrication therefor
US4485552A (en) * 1980-01-18 1984-12-04 International Business Machines Corporation Complementary transistor structure and method for manufacture
US4357622A (en) * 1980-01-18 1982-11-02 International Business Machines Corporation Complementary transistor structure
US4339767A (en) * 1980-05-05 1982-07-13 International Business Machines Corporation High performance PNP and NPN transistor structure
JPS6084873A (ja) * 1983-10-17 1985-05-14 Hitachi Ltd 半導体装置
JPS60109245A (ja) * 1983-11-18 1985-06-14 Hitachi Ltd 半導体集積回路装置およびその製造方法
IT1218471B (it) * 1985-05-09 1990-04-19 Ates Componenti Elettron Circuito integrato bipolare comprendente transistori pnp verticali con collettore sul substrato
IT1204244B (it) * 1986-03-21 1989-03-01 Sgs Microelettronica Spa Struttura npn equivalente con tensione di rottura maggiorata rispetto alla tensione di rottura intrinseca dell'npn

Also Published As

Publication number Publication date
EP0386413A2 (de) 1990-09-12
DE69022864T2 (de) 1996-05-30
EP0386413A3 (de) 1991-03-06
EP0386413B1 (de) 1995-10-11
JPH0712057B2 (ja) 1995-02-08
US4951115A (en) 1990-08-21
JPH02272758A (ja) 1990-11-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee