DE69132570D1 - Selbstjustierte Bipolartransistorstruktur und deren Herstellungsprozess - Google Patents

Selbstjustierte Bipolartransistorstruktur und deren Herstellungsprozess

Info

Publication number
DE69132570D1
DE69132570D1 DE69132570T DE69132570T DE69132570D1 DE 69132570 D1 DE69132570 D1 DE 69132570D1 DE 69132570 T DE69132570 T DE 69132570T DE 69132570 T DE69132570 T DE 69132570T DE 69132570 D1 DE69132570 D1 DE 69132570D1
Authority
DE
Germany
Prior art keywords
self
manufacturing process
bipolar transistor
transistor structure
aligned bipolar
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69132570T
Other languages
English (en)
Other versions
DE69132570T2 (de
Inventor
Robert H Eklund
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE69132570D1 publication Critical patent/DE69132570D1/de
Application granted granted Critical
Publication of DE69132570T2 publication Critical patent/DE69132570T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66265—Thin film bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/7317—Bipolar thin film transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76267—Vertical isolation by silicon implanted buried insulating layers, e.g. oxide layers, i.e. SIMOX techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289—Lateral isolation by air gap

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
DE69132570T 1990-09-17 1991-08-28 Selbstjustierte Bipolartransistorstruktur und deren Herstellungsprozess Expired - Fee Related DE69132570T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/583,422 US5087580A (en) 1990-09-17 1990-09-17 Self-aligned bipolar transistor structure and fabrication process

Publications (2)

Publication Number Publication Date
DE69132570D1 true DE69132570D1 (de) 2001-05-10
DE69132570T2 DE69132570T2 (de) 2001-10-25

Family

ID=24333032

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69132570T Expired - Fee Related DE69132570T2 (de) 1990-09-17 1991-08-28 Selbstjustierte Bipolartransistorstruktur und deren Herstellungsprozess

Country Status (4)

Country Link
US (1) US5087580A (de)
EP (1) EP0476380B1 (de)
JP (1) JP3372557B2 (de)
DE (1) DE69132570T2 (de)

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US5344785A (en) * 1992-03-13 1994-09-06 United Technologies Corporation Method of forming high speed, high voltage fully isolated bipolar transistors on a SOI substrate
US5273915A (en) * 1992-10-05 1993-12-28 Motorola, Inc. Method for fabricating bipolar junction and MOS transistors on SOI
US5460982A (en) * 1993-07-02 1995-10-24 Siemens Aktiengesellschaft Method for manufacturing lateral bipolar transistors
US5362659A (en) * 1994-04-25 1994-11-08 The United States Of America As Represented By The Secretary Of The Navy Method for fabricating vertical bipolar junction transistors in silicon bonded to an insulator
DE4418206C2 (de) * 1994-05-25 1999-01-14 Siemens Ag CMOS-kompatibler Bipolartransistor und Herstellungsverfahren desselben
US5583059A (en) * 1994-06-01 1996-12-10 International Business Machines Corporation Fabrication of vertical SiGe base HBT with lateral collector contact on thin SOI
US5610087A (en) * 1995-11-09 1997-03-11 Taiwan Semiconductor Manufacturing Company Ltd. Method for fabricating narrow base width lateral bipolar junction transistor, on SOI layer
DE69626802T2 (de) * 1995-12-28 2003-12-24 Koninkl Philips Electronics Nv Verfahren zur herstellung von einem selbstausrichtenden vertikalen bipolaren transistor auf einem soi
US5792678A (en) * 1996-05-02 1998-08-11 Motorola, Inc. Method for fabricating a semiconductor on insulator device
US5946582A (en) * 1997-01-07 1999-08-31 Telcordia Technologies, Inc. Method of making an InP-based heterojunction bipolar transistor with reduced base-collector capacitance
US6285044B1 (en) 1997-01-08 2001-09-04 Telcordia Technologies, Inc. InP-based heterojunction bipolar transistor with reduced base-collector capacitance
US5952695A (en) * 1997-03-05 1999-09-14 International Business Machines Corporation Silicon-on-insulator and CMOS-on-SOI double film structures
DE19842106A1 (de) 1998-09-08 2000-03-09 Inst Halbleiterphysik Gmbh Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung
KR100350764B1 (ko) 1998-12-30 2002-11-18 주식회사 하이닉스반도체 반도체소자의 제조방법
US6890827B1 (en) * 1999-01-13 2005-05-10 Agere Systems Inc. Method of fabricating a silicon on insulator transistor structure for imbedded DRAM
IT1308063B1 (it) * 1999-05-28 2001-11-29 St Microelectronics Srl Procedimento per la realizzazione di una fetta di materialesemiconduttore comprendente regioni di potenza dielettricamente
US6657281B1 (en) * 2000-08-03 2003-12-02 Agere Systems Inc. Bipolar transistor with a low K material in emitter base spacer regions
US6492211B1 (en) 2000-09-07 2002-12-10 International Business Machines Corporation Method for novel SOI DRAM BICMOS NPN
US6790722B1 (en) 2000-11-22 2004-09-14 International Business Machines Corporation Logic SOI structure, process and application for vertical bipolar transistor
CN1147935C (zh) * 2000-12-18 2004-04-28 黄敞 互补偶载场效应晶体管及其片上系统
US6469350B1 (en) * 2001-10-26 2002-10-22 International Business Machines Corporation Active well schemes for SOI technology
US6703685B2 (en) 2001-12-10 2004-03-09 Intel Corporation Super self-aligned collector device for mono-and hetero bipolar junction transistors
DE10202291A1 (de) * 2002-01-22 2003-08-07 Infineon Technologies Ag Bipolartransistor mit niederohmigem Basisanschluß
SE527487C2 (sv) 2004-03-02 2006-03-21 Infineon Technologies Ag En metod för framställning av en kondensator och en monolitiskt integrerad krets innefattande en sådan kondensator
EP1575094B1 (de) * 2004-03-12 2008-09-17 Infineon Technologies AG Bipolar-Transistor
EP1630863B1 (de) * 2004-08-31 2014-05-14 Infineon Technologies AG Verfahren zur Herstellung eines monolithisch integrierten vertikalen Halbleiterbauteils in einem SOI-Substrat
US20080001234A1 (en) * 2006-06-30 2008-01-03 Kangguo Cheng Hybrid Field Effect Transistor and Bipolar Junction Transistor Structures and Methods for Fabricating Such Structures
US7482672B2 (en) * 2006-06-30 2009-01-27 International Business Machines Corporation Semiconductor device structures for bipolar junction transistors
CN101719508B (zh) * 2009-11-10 2013-09-04 上海宏力半导体制造有限公司 一种薄soi纵向双极型晶体管及其制造方法
CN102104063B (zh) * 2009-12-17 2012-10-31 中国科学院上海微系统与信息技术研究所 一种soi纵向双极晶体管及其制作方法
US9111986B2 (en) 2014-01-09 2015-08-18 International Business Machines Corporation Self-aligned emitter-base-collector bipolar junction transistors with a single crystal raised extrinsic base
US9312370B2 (en) 2014-06-10 2016-04-12 Globalfoundries Inc. Bipolar transistor with extrinsic base region and methods of fabrication
US9570564B2 (en) 2014-08-05 2017-02-14 Globalfoundries Inc. Self-aligned emitter-base bipolar junction transistor with reduced base resistance and base-collector capacitance
US9768231B2 (en) * 2016-02-12 2017-09-19 Globalfoundries Singapore Pte. Ltd. High density multi-time programmable resistive memory devices and method of forming thereof

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DE3682021D1 (de) * 1985-10-23 1991-11-21 Hitachi Ltd Polysilizium-mos-transistor und verfahren zu seiner herstellung.
US4775641A (en) * 1986-09-25 1988-10-04 General Electric Company Method of making silicon-on-sapphire semiconductor devices
US4753896A (en) * 1986-11-21 1988-06-28 Texas Instruments Incorporated Sidewall channel stop process
DE3882251T2 (de) * 1987-01-30 1993-10-28 Texas Instruments Inc Verfahren zum Herstellen eines bipolaren Transistors unter Verwendung von CMOS-Techniken.
US4863878A (en) * 1987-04-06 1989-09-05 Texas Instruments Incorporated Method of making silicon on insalator material using oxygen implantation
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US4899202A (en) * 1988-07-08 1990-02-06 Texas Instruments Incorporated High performance silicon-on-insulator transistor with body node to source node connection
US4906587A (en) * 1988-07-29 1990-03-06 Texas Instruments Incorporated Making a silicon-on-insulator transistor with selectable body node to source node connection
US4957875A (en) * 1988-08-01 1990-09-18 International Business Machines Corporation Vertical bipolar transistor

Also Published As

Publication number Publication date
US5087580A (en) 1992-02-11
JPH0689900A (ja) 1994-03-29
DE69132570T2 (de) 2001-10-25
EP0476380B1 (de) 2001-04-04
EP0476380A1 (de) 1992-03-25
JP3372557B2 (ja) 2003-02-04

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Legal Events

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8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee