DE69032736D1 - Verfahren zur Herstellung eines Halbleiterbauelementes und so hergestelltes Halbleiterbauelement - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelementes und so hergestelltes Halbleiterbauelement

Info

Publication number
DE69032736D1
DE69032736D1 DE69032736T DE69032736T DE69032736D1 DE 69032736 D1 DE69032736 D1 DE 69032736D1 DE 69032736 T DE69032736 T DE 69032736T DE 69032736 T DE69032736 T DE 69032736T DE 69032736 D1 DE69032736 D1 DE 69032736D1
Authority
DE
Germany
Prior art keywords
semiconductor component
producing
way
produced
component produced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69032736T
Other languages
English (en)
Other versions
DE69032736T2 (de
Inventor
Tatsuki Kizu
Shinichi Shimada
Kiyoshi Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69032736D1 publication Critical patent/DE69032736D1/de
Publication of DE69032736T2 publication Critical patent/DE69032736T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/6659Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69032736T 1989-05-24 1990-05-23 Verfahren zur Herstellung eines Halbleiterbauelementes und so hergestelltes Halbleiterbauelement Expired - Fee Related DE69032736T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1128652A JPH0779101B2 (ja) 1989-05-24 1989-05-24 半導体装置の製法

Publications (2)

Publication Number Publication Date
DE69032736D1 true DE69032736D1 (de) 1998-12-10
DE69032736T2 DE69032736T2 (de) 1999-05-06

Family

ID=14990105

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69032736T Expired - Fee Related DE69032736T2 (de) 1989-05-24 1990-05-23 Verfahren zur Herstellung eines Halbleiterbauelementes und so hergestelltes Halbleiterbauelement

Country Status (4)

Country Link
EP (1) EP0399529B1 (de)
JP (1) JPH0779101B2 (de)
KR (1) KR930010975B1 (de)
DE (1) DE69032736T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06334135A (ja) * 1993-05-20 1994-12-02 Nec Corp 相補型misトランジスタの製造方法
BE1007672A3 (nl) * 1993-10-27 1995-09-12 Philips Electronics Nv Hoogfrequent halfgeleiderinrichting met beveiligingsinrichting.
KR100448087B1 (ko) * 1997-06-30 2004-12-03 삼성전자주식회사 트랜지스터의스페이서제조방법
GB2427076A (en) * 2004-03-31 2006-12-13 Advanced Micro Devices Inc Method of forming sidewall spacers

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE8201678L (sv) * 1982-03-17 1983-09-18 Asea Ab Sett att framstella foremal av mjukmagnetiskt material
JPS59138379A (ja) * 1983-01-27 1984-08-08 Toshiba Corp 半導体装置の製造方法
US4727038A (en) * 1984-08-22 1988-02-23 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor device
JPS6194326A (ja) * 1984-10-16 1986-05-13 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPH0740604B2 (ja) * 1985-07-30 1995-05-01 ソニー株式会社 Mos半導体装置の製造方法
EP0218408A3 (de) * 1985-09-25 1988-05-25 Hewlett-Packard Company Verfahren zum Herstellen einer schwach dotierten Drainstruktur (LLD) in integrierten Schaltungen

Also Published As

Publication number Publication date
KR930010975B1 (ko) 1993-11-18
JPH02308532A (ja) 1990-12-21
EP0399529B1 (de) 1998-11-04
KR900019156A (ko) 1990-12-24
DE69032736T2 (de) 1999-05-06
JPH0779101B2 (ja) 1995-08-23
EP0399529A1 (de) 1990-11-28

Similar Documents

Publication Publication Date Title
DE69422273D1 (de) Verfahren und Vorrichtung zur Herstellung eines Flächenhaftverschlusses
DE59002410D1 (de) Verfahren und Vorrichtung zur Herstellung eines Halbleiter-Schichtsystems.
DE69435114D1 (de) Verfahren zur Herstellung eines Halbleiterbauelements
ATE128608T1 (de) Verfahren zur herstellung eines flächenreissverschlusses und so hergestellter flächenreissverschluss.
DE69033153T2 (de) Verfahren zur Herstellung einer Halbleiterdünnschicht und damit hergestellte Halbleiterdünnschicht
DE69127609D1 (de) Vorrichtung und verfahren zur herstellung von diamanten
DE3484908D1 (de) Verfahren und vorrichtung zur herstellung eines gestuften hohlkoerpers.
ATA275189A (de) Verfahren und strangpresswerkzeug zur herstellung eines rohlings mit innenliegenden bohrungen
DE69028145D1 (de) Verfahren und Vorrichtung zur Herstellung von Reflexionshologrammen
DE69029430D1 (de) Verfahren zur Herstellung eines CMOS Halbleiterbauelements
DE68927782D1 (de) Zapfengelenk und Verfahren zur Herstellung eines solchen Gelenks
DE69515447D1 (de) Verfahren und Vorrichtung zur Herstellung eines Flächenhaftverschluss
DE69324883T2 (de) Vorrichtung und Verfahren zur Herstellung eines mehrschichtigen Formteils
DE69112791D1 (de) Verfahren und Vorrichtung zur Herstellung eines Bandes.
DE69124218D1 (de) Verfahren und Vorrichtung zur Herstellung von Metallzusammensetzungen in halbfestem Zustand
DE69028212D1 (de) Verfahren und vorrichtung zur herstellung von mehrschichtigen kunststoffgegenständen
DE69031712D1 (de) Verfahren zur Herstellung eines Halbleiterbauelementes
DE69424725T2 (de) Verfahren und Vorrichtung zur Herstellung einer Halbleiteranordnung
DE19681430T1 (de) Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements
DE58908512D1 (de) Verfahren und Vorrichtung zur Herstellung eines gleichmässigen Faserbandes.
DE69032074D1 (de) Verfahren zur Herstellung eines Halbleiterbauteils
DE69106468D1 (de) Verfahren und Vorrichtung zur Herstellung eines Kissens.
DE69126591D1 (de) Verfahren und Vorrichtung zur Herstellung eines zusammengesetzten Produktes
DE69132301D1 (de) Verfahren zur Herstellung eines Verbindungshalbleiterbauelements und damit hergestelltes Verbindungshalbleiterbauelement
DE69001703D1 (de) Verfahren und geraet zur herstellung einer nute in einem werkstueck.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee