DE69030914D1 - Halbleiterspeicheranordnung - Google Patents
HalbleiterspeicheranordnungInfo
- Publication number
- DE69030914D1 DE69030914D1 DE69030914T DE69030914T DE69030914D1 DE 69030914 D1 DE69030914 D1 DE 69030914D1 DE 69030914 T DE69030914 T DE 69030914T DE 69030914 T DE69030914 T DE 69030914T DE 69030914 D1 DE69030914 D1 DE 69030914D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
Landscapes
- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1296464A JPH07109703B2 (ja) | 1989-11-15 | 1989-11-15 | 半導体メモリ装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69030914D1 true DE69030914D1 (de) | 1997-07-17 |
DE69030914T2 DE69030914T2 (de) | 1997-11-06 |
Family
ID=17833894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69030914T Expired - Fee Related DE69030914T2 (de) | 1989-11-15 | 1990-11-15 | Halbleiterspeicheranordnung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5229971A (de) |
EP (1) | EP0432509B1 (de) |
JP (1) | JPH07109703B2 (de) |
DE (1) | DE69030914T2 (de) |
MY (1) | MY109622A (de) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2689032B2 (ja) * | 1991-04-05 | 1997-12-10 | 三菱電機株式会社 | 半導体装置 |
JPH0528756A (ja) * | 1991-07-24 | 1993-02-05 | Toshiba Corp | 半導体記憶装置 |
JPH0636560A (ja) * | 1992-07-21 | 1994-02-10 | Mitsubishi Electric Corp | 半導体記憶装置 |
US5384726A (en) * | 1993-03-18 | 1995-01-24 | Fujitsu Limited | Semiconductor memory device having a capability for controlled activation of sense amplifiers |
US5390139A (en) * | 1993-05-28 | 1995-02-14 | Texas Instruments Incorporated | Devices, systems and methods for implementing a Kanerva memory |
JP3547466B2 (ja) * | 1993-11-29 | 2004-07-28 | 株式会社東芝 | メモリ装置、シリアル‐パラレルデータ変換回路、メモリ装置にデータを書き込む方法、およびシリアル‐パラレルデータ変換方法 |
US5577193A (en) * | 1994-09-28 | 1996-11-19 | International Business Machines Corporation | Multiple data registers and addressing technique therefore for block/flash writing main memory of a DRAM/VRAM |
US5633661A (en) * | 1994-11-21 | 1997-05-27 | International Business Machines Corporation | Video display control system having block write with opaque pattern control expansion |
US5835436A (en) * | 1995-07-03 | 1998-11-10 | Mitsubishi Denki Kabushiki Kaisha | Dynamic type semiconductor memory device capable of transferring data between array blocks at high speed |
US5764963A (en) * | 1995-07-07 | 1998-06-09 | Rambus, Inc. | Method and apparatus for performing maskable multiple color block writes |
US5860129A (en) * | 1995-09-27 | 1999-01-12 | Motorola, Inc. | Data processing system for writing an external device and method therefor |
US5752267A (en) * | 1995-09-27 | 1998-05-12 | Motorola Inc. | Data processing system for accessing an external device during a burst mode of operation and method therefor |
TW307869B (en) * | 1995-12-20 | 1997-06-11 | Toshiba Co Ltd | Semiconductor memory |
US5740116A (en) * | 1995-12-22 | 1998-04-14 | Townsend And Townsend And Crew, Llp | Current limiting during block writes of memory circuits |
US5838631A (en) | 1996-04-19 | 1998-11-17 | Integrated Device Technology, Inc. | Fully synchronous pipelined ram |
JPH11120797A (ja) * | 1997-10-15 | 1999-04-30 | Toshiba Microelectronics Corp | 強誘電体メモリ及びそのスクリーニング方法 |
US6115320A (en) | 1998-02-23 | 2000-09-05 | Integrated Device Technology, Inc. | Separate byte control on fully synchronous pipelined SRAM |
US6011727A (en) * | 1998-08-26 | 2000-01-04 | Micron Technology, Inc. | Block write circuit and method for wide data path memory devices |
JP4191217B2 (ja) * | 2006-09-20 | 2008-12-03 | エルピーダメモリ株式会社 | 半導体装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0214705B1 (de) * | 1980-10-15 | 1992-01-15 | Kabushiki Kaisha Toshiba | Halbleiterspeicher mit Datenprogrammierzeit |
JPS62231495A (ja) * | 1986-03-31 | 1987-10-12 | Toshiba Corp | 半導体記憶装置 |
JPH0760594B2 (ja) * | 1987-06-25 | 1995-06-28 | 富士通株式会社 | 半導体記憶装置 |
JP2714944B2 (ja) * | 1987-08-05 | 1998-02-16 | 三菱電機株式会社 | 半導体記憶装置 |
US4807189A (en) * | 1987-08-05 | 1989-02-21 | Texas Instruments Incorporated | Read/write memory having a multiple column select mode |
JPH01146187A (ja) * | 1987-12-02 | 1989-06-08 | Mitsubishi Electric Corp | キヤッシュメモリ内蔵半導体記憶装置 |
JPH0770212B2 (ja) * | 1988-07-19 | 1995-07-31 | 日本電気株式会社 | 半導体メモリ回路 |
JP2633645B2 (ja) * | 1988-09-13 | 1997-07-23 | 株式会社東芝 | 半導体メモリ装置 |
-
1989
- 1989-11-15 JP JP1296464A patent/JPH07109703B2/ja not_active Expired - Lifetime
-
1990
- 1990-11-14 MY MYPI90002008A patent/MY109622A/en unknown
- 1990-11-15 DE DE69030914T patent/DE69030914T2/de not_active Expired - Fee Related
- 1990-11-15 US US07/613,001 patent/US5229971A/en not_active Expired - Fee Related
- 1990-11-15 EP EP90121917A patent/EP0432509B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5229971A (en) | 1993-07-20 |
JPH07109703B2 (ja) | 1995-11-22 |
MY109622A (en) | 1997-03-31 |
EP0432509A3 (en) | 1992-09-30 |
DE69030914T2 (de) | 1997-11-06 |
EP0432509B1 (de) | 1997-06-11 |
EP0432509A2 (de) | 1991-06-19 |
JPH03157894A (ja) | 1991-07-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |