DE68928905T2 - Muster-Herstellungsverfahren - Google Patents

Muster-Herstellungsverfahren

Info

Publication number
DE68928905T2
DE68928905T2 DE68928905T DE68928905T DE68928905T2 DE 68928905 T2 DE68928905 T2 DE 68928905T2 DE 68928905 T DE68928905 T DE 68928905T DE 68928905 T DE68928905 T DE 68928905T DE 68928905 T2 DE68928905 T2 DE 68928905T2
Authority
DE
Germany
Prior art keywords
manufacturing process
sample manufacturing
sample
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68928905T
Other languages
English (en)
Other versions
DE68928905D1 (de
Inventor
Hiroshi Takenaka
Yoshihiro Todokoro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE68928905D1 publication Critical patent/DE68928905D1/de
Application granted granted Critical
Publication of DE68928905T2 publication Critical patent/DE68928905T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/30—Imagewise removal using liquid means
    • G03F7/32—Liquid compositions therefor, e.g. developers
    • G03F7/322—Aqueous alkaline compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • H01L21/28587—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds characterised by the sectional shape, e.g. T, inverted T
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
DE68928905T 1988-11-28 1989-11-28 Muster-Herstellungsverfahren Expired - Fee Related DE68928905T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP29986688 1988-11-28
JP21437789 1989-08-21

Publications (2)

Publication Number Publication Date
DE68928905D1 DE68928905D1 (de) 1999-02-25
DE68928905T2 true DE68928905T2 (de) 1999-06-10

Family

ID=26520289

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68928905T Expired - Fee Related DE68928905T2 (de) 1988-11-28 1989-11-28 Muster-Herstellungsverfahren

Country Status (4)

Country Link
US (1) US5122387A (de)
EP (1) EP0372790B1 (de)
JP (1) JP2538081B2 (de)
DE (1) DE68928905T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06140434A (ja) * 1992-10-26 1994-05-20 Mitsubishi Electric Corp 電界効果型トランジスタの製造方法
JP3119957B2 (ja) * 1992-11-30 2000-12-25 株式会社東芝 半導体装置の製造方法
JP2565119B2 (ja) * 1993-11-30 1996-12-18 日本電気株式会社 パターン形成方法
US6495311B1 (en) 2000-03-17 2002-12-17 International Business Machines Corporation Bilayer liftoff process for high moment laminate
US6541182B1 (en) 2000-06-09 2003-04-01 Tdk Corporation Method for forming fine exposure patterns using dual exposure
US6524937B1 (en) * 2000-08-23 2003-02-25 Tyco Electronics Corp. Selective T-gate process
US6737202B2 (en) 2002-02-22 2004-05-18 Motorola, Inc. Method of fabricating a tiered structure using a multi-layered resist stack and use
KR100755366B1 (ko) * 2006-02-21 2007-09-04 삼성전자주식회사 포토레지스트 패턴을 이용한 반도체소자의 패턴 형성방법들
US8323868B2 (en) * 2009-11-06 2012-12-04 International Business Machines Corporation Bilayer systems including a polydimethylglutarimide-based bottom layer and compositions thereof
US9091932B2 (en) 2011-09-21 2015-07-28 Stmicroelectronics S.R.L. Three-dimensional integrated structure having a high shape factor, and related forming method
CN107134407A (zh) * 2017-05-12 2017-09-05 中国科学院微电子研究所 一种基于双层光刻胶工艺的二维材料场效应管制造方法
JP7214593B2 (ja) * 2019-08-13 2023-01-30 キオクシア株式会社 フォトマスクの製造方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3964908A (en) * 1975-09-22 1976-06-22 International Business Machines Corporation Positive resists containing dimethylglutarimide units
US4024293A (en) * 1975-12-10 1977-05-17 International Business Machines Corporation High sensitivity resist system for lift-off metallization
FR2390760A1 (fr) * 1977-05-12 1978-12-08 Rhone Poulenc Graphic Nouvelles plaques lithographiques a base de photopolymeres et procedes de mise en oeuvre
GB1591988A (en) * 1977-12-29 1981-07-01 Vickers Ltd Lithographic printing
US4212935A (en) * 1978-02-24 1980-07-15 International Business Machines Corporation Method of modifying the development profile of photoresists
JPS56122031A (en) * 1980-03-01 1981-09-25 Japan Synthetic Rubber Co Ltd Positive type photosensitive resin composition
JPS5730829A (en) * 1980-08-01 1982-02-19 Hitachi Ltd Micropattern formation method
US4415652A (en) * 1982-01-04 1983-11-15 E. I. Du Pont De Nemours & Co. Aqueous processable, positive-working photopolymer compositions
JPS6091639A (ja) * 1983-10-26 1985-05-23 Alps Electric Co Ltd フオトレジストパタ−ンの形成方法
US4524121A (en) * 1983-11-21 1985-06-18 Rohm And Haas Company Positive photoresists containing preformed polyglutarimide polymer
WO1986001009A1 (en) * 1984-07-23 1986-02-13 Nippon Telegraph And Telephone Corporation Pattern formation
JPS6180148A (ja) * 1984-09-27 1986-04-23 Fuji Photo Film Co Ltd 熱現像感光材料
EP0177905B1 (de) * 1984-10-09 1990-12-05 Hoechst Japan Kabushiki Kaisha Verfahren zum Entwickeln und zum Entschichten von Photoresistschichten mit quaternären Ammomiumverbindungen
DE3447357A1 (de) * 1984-12-24 1986-07-03 Basf Ag, 6700 Ludwigshafen Trockenfilmresist und verfahren zur herstellung von resistmustern
GB8512998D0 (en) * 1985-05-22 1985-06-26 Ciba Geigy Ag Production of images
JPS6232453A (ja) * 1985-08-06 1987-02-12 Tokyo Ohka Kogyo Co Ltd ポジ型ホトレジスト用現像液
JPS62102241A (ja) * 1985-10-30 1987-05-12 Tokyo Ohka Kogyo Co Ltd 感光性組成物
DE3705896A1 (de) * 1986-02-24 1987-08-27 Tokyo Ohka Kogyo Co Ltd Verfahren zur herstellung eines fotoresistmusters auf einer substratflaeche und ein dafuer geeignetes schaumentfernungsmittel
US4912018A (en) * 1986-02-24 1990-03-27 Hoechst Celanese Corporation High resolution photoresist based on imide containing polymers
US4806453A (en) * 1986-05-07 1989-02-21 Shipley Company Inc. Positive acting bilayer photoresist development
US4939070A (en) * 1986-07-28 1990-07-03 Brunsvold William R Thermally stable photoresists with high sensitivity
US4791171A (en) * 1986-12-31 1988-12-13 Shipley Company Inc. Silylated poly(vinyl)phenol polymers
US4770739A (en) * 1987-02-03 1988-09-13 Texas Instruments Incorporated Bilayer photoresist process
JPS63246821A (ja) * 1987-04-02 1988-10-13 Matsushita Electric Ind Co Ltd パタ−ン形成方法
JPS63316436A (ja) * 1987-06-19 1988-12-23 Sony Corp レジストパタ−ンの形成方法
US4814258A (en) * 1987-07-24 1989-03-21 Motorola Inc. PMGI bi-layer lift-off process
EP0341843A3 (de) * 1988-05-09 1991-03-27 International Business Machines Corporation Verfahren zur Herstellung eines Leitermusters

Also Published As

Publication number Publication date
EP0372790A2 (de) 1990-06-13
DE68928905D1 (de) 1999-02-25
US5122387A (en) 1992-06-16
JPH03170936A (ja) 1991-07-24
JP2538081B2 (ja) 1996-09-25
EP0372790A3 (de) 1991-06-12
EP0372790B1 (de) 1999-01-13

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee