DE68927241T2 - Pipelineschaltung für Zeitablaufregelung - Google Patents

Pipelineschaltung für Zeitablaufregelung

Info

Publication number
DE68927241T2
DE68927241T2 DE68927241T DE68927241T DE68927241T2 DE 68927241 T2 DE68927241 T2 DE 68927241T2 DE 68927241 T DE68927241 T DE 68927241T DE 68927241 T DE68927241 T DE 68927241T DE 68927241 T2 DE68927241 T2 DE 68927241T2
Authority
DE
Germany
Prior art keywords
timing control
pipeline circuit
pipeline
circuit
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68927241T
Other languages
English (en)
Other versions
DE68927241D1 (de
Inventor
Toshiyuki C O Nec Corpor Furui
Yoshifumi C O Nec Cor Fujiwara
Akira Ishizuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP12354988A external-priority patent/JPH0673106B2/ja
Priority claimed from JP12354888A external-priority patent/JPH01292533A/ja
Priority claimed from JP12355088A external-priority patent/JPH0673107B2/ja
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE68927241D1 publication Critical patent/DE68927241D1/de
Publication of DE68927241T2 publication Critical patent/DE68927241T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
DE68927241T 1988-05-20 1989-05-18 Pipelineschaltung für Zeitablaufregelung Expired - Fee Related DE68927241T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP12354988A JPH0673106B2 (ja) 1988-05-20 1988-05-20 パイプライン回路
JP12354888A JPH01292533A (ja) 1988-05-20 1988-05-20 パイプライン回路
JP12355088A JPH0673107B2 (ja) 1988-05-20 1988-05-20 パイプライン回路

Publications (2)

Publication Number Publication Date
DE68927241D1 DE68927241D1 (de) 1996-10-31
DE68927241T2 true DE68927241T2 (de) 1997-03-06

Family

ID=27314740

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68927241T Expired - Fee Related DE68927241T2 (de) 1988-05-20 1989-05-18 Pipelineschaltung für Zeitablaufregelung

Country Status (3)

Country Link
US (1) US5142685A (de)
EP (1) EP0342674B1 (de)
DE (1) DE68927241T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5572714A (en) * 1992-10-23 1996-11-05 Matsushita Electric Industrial Co., Ltd. Integrated circuit for pipeline data processing
US5896552A (en) * 1995-06-07 1999-04-20 National Instruments Corporation Bus analyzer for capturing bus signals at a predetermined rate and upon assertion of a data valid signal
EP0769738B1 (de) * 1995-10-20 2003-03-12 Kabushiki Kaisha Toshiba Logische Schaltung, die nach dem Carry select Prinzip arbeitet
US5886658A (en) * 1997-05-15 1999-03-23 Crystal Semiconductor Corporation Serial port interface system and method for an analog-to-digital converter
US6484027B1 (en) * 1998-06-15 2002-11-19 Sbc Technology Resources, Inc. Enhanced wireless handset, including direct handset-to-handset communication mode

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5255446A (en) * 1975-10-31 1977-05-06 Toshiba Corp Information transfer control system
US4371927A (en) * 1977-11-22 1983-02-01 Honeywell Information Systems Inc. Data processing system programmable pre-read capability
US4189767A (en) * 1978-06-05 1980-02-19 Bell Telephone Laboratories, Incorporated Accessing arrangement for interleaved modular memories
FR2465269B1 (fr) * 1979-09-12 1985-12-27 Cii Honeywell Bull Selecteur de demandes asynchrones dans un systeme de traitement de l'information
US4574345A (en) * 1981-04-01 1986-03-04 Advanced Parallel Systems, Inc. Multiprocessor computer system utilizing a tapped delay line instruction bus
US4553203A (en) * 1982-09-28 1985-11-12 Trw Inc. Easily schedulable horizontal computer
JPH0652530B2 (ja) * 1982-10-25 1994-07-06 株式会社日立製作所 ベクトル・プロセッサ
US4802120A (en) * 1984-10-30 1989-01-31 Tandy Corporation Multistage timing circuit for system bus control
US4682284A (en) * 1984-12-06 1987-07-21 American Telephone & Telegraph Co., At&T Bell Lab. Queue administration method and apparatus
JPH0766329B2 (ja) * 1985-06-14 1995-07-19 株式会社日立製作所 情報処理装置
JPS6226580A (ja) * 1985-07-29 1987-02-04 Hitachi Ltd 障害処理方式
JPS62250748A (ja) * 1986-04-24 1987-10-31 Matsushita Electric Ind Co Ltd 符号変換装置

Also Published As

Publication number Publication date
DE68927241D1 (de) 1996-10-31
EP0342674A3 (de) 1991-03-20
EP0342674B1 (de) 1996-09-25
US5142685A (en) 1992-08-25
EP0342674A2 (de) 1989-11-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee