DE68921112D1 - Integrierte Schaltung mit Bipolar-CMOS-Schaltung. - Google Patents

Integrierte Schaltung mit Bipolar-CMOS-Schaltung.

Info

Publication number
DE68921112D1
DE68921112D1 DE68921112T DE68921112T DE68921112D1 DE 68921112 D1 DE68921112 D1 DE 68921112D1 DE 68921112 T DE68921112 T DE 68921112T DE 68921112 T DE68921112 T DE 68921112T DE 68921112 D1 DE68921112 D1 DE 68921112D1
Authority
DE
Germany
Prior art keywords
circuit
bipolar cmos
integrated circuit
integrated
cmos circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68921112T
Other languages
English (en)
Other versions
DE68921112T2 (de
Inventor
Tohru Takeshima
Takashi Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu VLSI Ltd
Fujitsu Ltd
Original Assignee
Fujitsu VLSI Ltd
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu VLSI Ltd, Fujitsu Ltd filed Critical Fujitsu VLSI Ltd
Application granted granted Critical
Publication of DE68921112D1 publication Critical patent/DE68921112D1/de
Publication of DE68921112T2 publication Critical patent/DE68921112T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/021—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of more than one type of element or means, e.g. BIMOS, composite devices such as IGBT
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356104—Bistable circuits using complementary field-effect transistors
DE68921112T 1988-07-29 1989-07-28 Integrierte Schaltung mit Bipolar-CMOS-Schaltung. Expired - Fee Related DE68921112T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63189981A JPH0239719A (ja) 1988-07-29 1988-07-29 半導体回路

Publications (2)

Publication Number Publication Date
DE68921112D1 true DE68921112D1 (de) 1995-03-23
DE68921112T2 DE68921112T2 (de) 1995-06-08

Family

ID=16250405

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68921112T Expired - Fee Related DE68921112T2 (de) 1988-07-29 1989-07-28 Integrierte Schaltung mit Bipolar-CMOS-Schaltung.

Country Status (5)

Country Link
US (1) US4972096A (de)
EP (1) EP0353163B1 (de)
JP (1) JPH0239719A (de)
KR (1) KR920010998B1 (de)
DE (1) DE68921112T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2540934B2 (ja) * 1989-03-09 1996-10-09 三菱電機株式会社 論理回路装置
JPH0355914A (ja) * 1989-07-25 1991-03-11 Fujitsu Ltd 半導体装置
EP0608666B1 (de) * 1993-01-29 1998-04-29 STMicroelectronics S.r.l. Monolithisch integrierbares Zeitverzögerungsfilter

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0783252B2 (ja) * 1982-07-12 1995-09-06 株式会社日立製作所 半導体集積回路装置
US4645954A (en) * 1985-10-21 1987-02-24 International Business Machines Corp. ECL to FET interface circuit for field effect transistor arrays
JPS62254460A (ja) * 1986-04-26 1987-11-06 Toshiba Corp Ｂｉ−ＣＭＯＳ論理回路
JPH0611111B2 (ja) * 1987-03-27 1994-02-09 株式会社東芝 ＢｉＭＯＳ論理回路
US4926069A (en) * 1987-08-17 1990-05-15 Nec Corporation Bi-MOS circuit capable of high speed operation with low power consumption
JP2593894B2 (ja) * 1987-11-16 1997-03-26 富士通株式会社 半導体記憶装置
JPH07109980B2 (ja) * 1988-05-19 1995-11-22 富士通株式会社 半導体集積回路
US4845385A (en) * 1988-06-21 1989-07-04 Silicon Connections Corporation BiCMOS logic circuits with reduced crowbar current

Also Published As

Publication number Publication date
DE68921112T2 (de) 1995-06-08
EP0353163A3 (de) 1991-05-08
KR920010998B1 (ko) 1992-12-26
EP0353163A2 (de) 1990-01-31
KR910003654A (ko) 1991-02-28
EP0353163B1 (de) 1995-02-15
US4972096A (en) 1990-11-20
JPH0239719A (ja) 1990-02-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee