DE68920523D1 - Verfahren zur Korrektur von Mehr-Byte-Fehlern. - Google Patents

Verfahren zur Korrektur von Mehr-Byte-Fehlern.

Info

Publication number
DE68920523D1
DE68920523D1 DE68920523T DE68920523T DE68920523D1 DE 68920523 D1 DE68920523 D1 DE 68920523D1 DE 68920523 T DE68920523 T DE 68920523T DE 68920523 T DE68920523 T DE 68920523T DE 68920523 D1 DE68920523 D1 DE 68920523D1
Authority
DE
Germany
Prior art keywords
procedure
byte errors
correcting multi
correcting
byte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68920523T
Other languages
English (en)
Other versions
DE68920523T2 (de
Inventor
John Scott Eggenberger
Paul Hodges
Arvind Motibhai Patel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE68920523D1 publication Critical patent/DE68920523D1/de
Application granted granted Critical
Publication of DE68920523T2 publication Critical patent/DE68920523T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10—Digital recording or reproducing
    • G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
    • G11B20/1866—Error detection or correction; Testing, e.g. of drop-outs by interleaving

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Detection And Correction Of Errors (AREA)
  • Error Detection And Correction (AREA)
DE68920523T 1988-09-21 1989-08-24 Verfahren zur Korrektur von Mehr-Byte-Fehlern. Expired - Fee Related DE68920523T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/247,461 US4916701A (en) 1988-09-21 1988-09-21 Method and system for correcting long bursts of consecutive errors

Publications (2)

Publication Number Publication Date
DE68920523D1 true DE68920523D1 (de) 1995-02-23
DE68920523T2 DE68920523T2 (de) 1995-07-20

Family

ID=22935027

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68920523T Expired - Fee Related DE68920523T2 (de) 1988-09-21 1989-08-24 Verfahren zur Korrektur von Mehr-Byte-Fehlern.

Country Status (9)

Country Link
US (1) US4916701A (de)
EP (1) EP0360424B1 (de)
JP (1) JPH0831805B2 (de)
KR (1) KR920006998B1 (de)
CN (1) CN1011268B (de)
AU (1) AU616788B2 (de)
BR (1) BR8904735A (de)
CA (1) CA1309495C (de)
DE (1) DE68920523T2 (de)

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JPH03198544A (ja) * 1989-12-27 1991-08-29 Nec Corp パリティ計数回路
JP2770611B2 (ja) * 1991-07-17 1998-07-02 日本電気株式会社 データエラー再試行回路
US5623507A (en) * 1991-09-13 1997-04-22 Storage Technology Corporation Error pointers for enhanced error correction
JP2721099B2 (ja) * 1991-12-18 1998-03-04 インターナショナル・ビジネス・マシーンズ・コーポレイション エラーバースト修正のための試行錯誤方法及びマルチバイトエラーの修正方法
JP3259323B2 (ja) * 1992-04-13 2002-02-25 ソニー株式会社 デ・インターリーブ回路
US5329535A (en) * 1992-04-30 1994-07-12 International Business Machines Corporation Variable block lengths on-the-fly error correcting decoder
JP3520576B2 (ja) * 1994-10-24 2004-04-19 ソニー株式会社 誤り訂正方法
US5497111A (en) * 1994-12-22 1996-03-05 International Business Machines Corporation Peak detection circuit for suppressing magnetoresistive thermal asperity transients in a data channel
BR9606294B1 (pt) * 1995-04-03 2009-01-13 mÉtodo para dispor dados de paridade, mÉtodo para transmitir, receber, gravar e reproduzir dados de informaÇço e dados de paridade, aparelho para dispor dados de paridade, sistema de transmissço de dados, transmissor de dados, receptor de dados, aparelho de gravaÇço e reproduÇço de dados, gravador de dados, reprodutor de dados, meio de gravaÇço e sinal tendo uma estrutura de dados de dados de informaÇço e dados de paridade.
DE19614701A1 (de) * 1996-04-15 1997-10-16 Bosch Gmbh Robert Verfahren zur Übertragung von codierten Daten
US6219814B1 (en) 1996-12-23 2001-04-17 International Business Machines Corporation Method and apparatus for selectively varying error correcting code (ECC) power in a direct access storage device (DASD)
JP3104646B2 (ja) * 1997-06-04 2000-10-30 ソニー株式会社 外部記憶装置
US6003144A (en) * 1997-06-30 1999-12-14 Compaq Computer Corporation Error detection and correction
US6275965B1 (en) * 1997-11-17 2001-08-14 International Business Machines Corporation Method and apparatus for efficient error detection and correction in long byte strings using generalized, integrated, interleaved reed-solomon codewords
JP2000148408A (ja) * 1998-11-17 2000-05-30 Nec Corp 磁気ディスク装置のデータチェック回路，同方式，および同方法
JP2002027782A (ja) 2000-07-10 2002-01-25 Sony Corp センサレスモータの起動システム
JP4174967B2 (ja) * 2000-12-18 2008-11-05 船井電機株式会社 追記型光ディスクの記録方法
US7013422B2 (en) * 2001-06-15 2006-03-14 International Business Machines Corporation Noise removal in multibyte text encodings using statistical models
US6891690B2 (en) * 2002-11-20 2005-05-10 International Business Machines Corporation On-drive integrated sector format raid error correction code system and method
KR101300810B1 (ko) * 2006-04-03 2013-08-26 삼성전자주식회사 데이터 인코딩 및 디코딩 방법과 그 장치, 저장 매체, 및저장 매체 구동 시스템
DE112006003922T5 (de) * 2006-06-28 2009-04-30 Intel Corporation, Santa Clara Modifikation bei einem Meggit-Decodierer für Fehlerkorrekturverfahren bei Bursts
US7721140B2 (en) * 2007-01-02 2010-05-18 International Business Machines Corporation Systems and methods for improving serviceability of a memory system
EP2009828B1 (de) * 2007-06-28 2016-01-27 Alcatel Lucent Verfahren zur Bereitstellung ungleichen Fehlerschutzes für Datenpakete in einem Burst-Übertragungssystem
US8289640B2 (en) 2008-08-11 2012-10-16 International Business Machines Corporation Error burst detection and amelioration
US8717698B2 (en) 2011-10-12 2014-05-06 International Business Machines Corporation Hierarchical control of tiered error recovery for storage devices
CN103809147A (zh) * 2012-11-12 2014-05-21 苏州工业园区新宏博通讯科技有限公司 一种交流电表故障自诊断方法
KR101750662B1 (ko) 2013-06-24 2017-06-23 마이크론 테크놀로지, 인크. 데이터 에러 교정용 회로, 장치, 및 방법
CN107203436B (zh) * 2017-05-25 2021-04-06 郑州云海信息技术有限公司 一种Nand Flash数据校验的方法与装置
US11994938B2 (en) 2021-11-11 2024-05-28 Samsung Electronics Co., Ltd. Systems and methods for detecting intra-chip communication errors in a reconfigurable hardware system
US11886295B2 (en) 2022-01-31 2024-01-30 Pure Storage, Inc. Intra-block error correction

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2485237B1 (fr) * 1980-06-19 1987-08-07 Thomson Csf Dispositif de correction, en temps reel, d'erreurs sur des donnees enregistrees sur un support magnetique, et systeme de traitement de donnees comportant un tel dispositif
JPS5735444A (en) * 1980-08-12 1982-02-26 Sony Corp Pcm signal transmission method
US4525838A (en) * 1983-02-28 1985-06-25 International Business Machines Corporation Multibyte error correcting system involving a two-level code structure
US4706250A (en) * 1985-09-27 1987-11-10 International Business Machines Corporation Method and apparatus for correcting multibyte errors having improved two-level code structure
JPS62120670A (ja) * 1985-11-20 1987-06-01 Sony Corp デ−タの誤り訂正方法
US4703485A (en) * 1986-02-10 1987-10-27 International Business Machines Corporation Method and apparatus for computing and implementing error detection check bytes
JPS62234426A (ja) * 1986-04-04 1987-10-14 Sony Corp エラ−訂正方法
NL8601446A (nl) * 1986-06-05 1988-01-04 Philips Nv Werkwijze en inrichting voor het dekoderen van een blok kodesymbolen dat op twee manieren verdeeld is over kodewoorden die elk door een minimum-afstandssepareerbare kode beschermd zijn.
JP2605271B2 (ja) * 1987-02-10 1997-04-30 ソニー株式会社 エラー訂正及びチエツク装置

Also Published As

Publication number Publication date
EP0360424A3 (de) 1991-10-16
DE68920523T2 (de) 1995-07-20
AU3928289A (en) 1990-03-29
AU616788B2 (en) 1991-11-07
JPH0295029A (ja) 1990-04-05
CN1011268B (zh) 1991-01-16
EP0360424A2 (de) 1990-03-28
KR900005292A (ko) 1990-04-13
CN1041463A (zh) 1990-04-18
KR920006998B1 (ko) 1992-08-24
US4916701A (en) 1990-04-10
JPH0831805B2 (ja) 1996-03-27
CA1309495C (en) 1992-10-27
EP0360424B1 (de) 1995-01-11
BR8904735A (pt) 1990-05-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee