DE60322185D1 - Verfahren zur umwandlungserleichterung zwischen asynchronen und synchronen domänen - Google Patents

Verfahren zur umwandlungserleichterung zwischen asynchronen und synchronen domänen

Info

Publication number
DE60322185D1
DE60322185D1 DE60322185T DE60322185T DE60322185D1 DE 60322185 D1 DE60322185 D1 DE 60322185D1 DE 60322185 T DE60322185 T DE 60322185T DE 60322185 T DE60322185 T DE 60322185T DE 60322185 D1 DE60322185 D1 DE 60322185D1
Authority
DE
Germany
Prior art keywords
data
interface
domain
asynchrones
converting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60322185T
Other languages
English (en)
Inventor
Michael I Davies
Andrew Lines
Robert Southworth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fulcrum Microsystems Inc
Original Assignee
Fulcrum Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fulcrum Microsystems Inc filed Critical Fulcrum Microsystems Inc
Application granted granted Critical
Publication of DE60322185D1 publication Critical patent/DE60322185D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/405Coupling between buses using bus bridges where the bridge performs a synchronising function
    • G06F13/4059Coupling between buses using bus bridges where the bridge performs a synchronising function where the synchronisation uses buffers, e.g. for speed matching between buses

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Pharmaceuticals Containing Other Organic And Inorganic Compounds (AREA)
DE60322185T 2002-02-12 2003-02-11 Verfahren zur umwandlungserleichterung zwischen asynchronen und synchronen domänen Expired - Lifetime DE60322185D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US35720102P 2002-02-12 2002-02-12
US10/212,574 US6950959B2 (en) 2002-02-12 2002-08-01 Techniques for facilitating conversion between asynchronous and synchronous domains
PCT/US2003/004344 WO2003069485A2 (en) 2002-02-12 2003-02-11 Techniques for facilitating conversion between asynchronous and synchronous domains

Publications (1)

Publication Number Publication Date
DE60322185D1 true DE60322185D1 (de) 2008-08-28

Family

ID=27737078

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60322185T Expired - Lifetime DE60322185D1 (de) 2002-02-12 2003-02-11 Verfahren zur umwandlungserleichterung zwischen asynchronen und synchronen domänen

Country Status (7)

Country Link
US (2) US6950959B2 (de)
EP (1) EP1474748B1 (de)
JP (1) JP4520742B2 (de)
AT (1) ATE401607T1 (de)
AU (1) AU2003215211A1 (de)
DE (1) DE60322185D1 (de)
WO (1) WO2003069485A2 (de)

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US8074193B2 (en) * 2009-03-11 2011-12-06 Institute of Computer Science (ICS) of the Foundation for Research & Technology Hellas-Foundation for Research and Technology Hellas (FORTH) Apparatus and method for mixed single-rail and dual-rail combinational logic with completion detection
US8161435B2 (en) 2009-07-20 2012-04-17 Achronix Semiconductor Corporation Reset mechanism conversion
US8301933B2 (en) * 2009-09-14 2012-10-30 Achronix Semiconductor Corporation Multi-clock asynchronous logic circuits
US7900078B1 (en) * 2009-09-14 2011-03-01 Achronix Semiconductor Corporation Asynchronous conversion circuitry apparatus, systems, and methods
EP2466478B1 (de) * 2010-12-20 2013-11-27 STMicroelectronics (Grenoble 2) SAS Kommunikationssystem, und entsprechende integrierte Schaltung und Verfahren
EP2466479B1 (de) * 2010-12-20 2013-11-27 STMicroelectronics (Grenoble 2) SAS Schnittstellensystem, entsprechende integrierte Schaltung und Verfahren
US8599982B2 (en) 2010-12-20 2013-12-03 Stmicroelectronics S.R.L. Interface system, and corresponding integrated circuit and method
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US9520180B1 (en) 2014-03-11 2016-12-13 Hypres, Inc. System and method for cryogenic hybrid technology computing and memory
US9558309B2 (en) * 2014-05-09 2017-01-31 University Of Southern California Timing violation resilient asynchronous template
US9843339B1 (en) * 2016-08-26 2017-12-12 Hrl Laboratories, Llc Asynchronous pulse domain to synchronous digital domain converter
WO2020008229A1 (en) * 2018-07-03 2020-01-09 Dolphin Integration Circuit and method for protecting asynchronous circuits
CN113407467B (zh) * 2021-07-19 2023-05-30 北京中科芯蕊科技有限公司 一种基于Mousetrap的同步异步转换接口及装置

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Also Published As

Publication number Publication date
WO2003069485A3 (en) 2004-04-01
WO2003069485A2 (en) 2003-08-21
US20030165158A1 (en) 2003-09-04
US6950959B2 (en) 2005-09-27
AU2003215211A8 (en) 2003-09-04
JP4520742B2 (ja) 2010-08-11
ATE401607T1 (de) 2008-08-15
JP2005518018A (ja) 2005-06-16
EP1474748B1 (de) 2008-07-16
US20030159078A1 (en) 2003-08-21
US6961863B2 (en) 2005-11-01
EP1474748A2 (de) 2004-11-10
AU2003215211A1 (en) 2003-09-04

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