DE60318069D1 - Schaltung und verfahren zum prüfen eingebetteter dram-schaltungen durch direktzugriffsmodus - Google Patents

Schaltung und verfahren zum prüfen eingebetteter dram-schaltungen durch direktzugriffsmodus

Info

Publication number
DE60318069D1
DE60318069D1 DE60318069T DE60318069T DE60318069D1 DE 60318069 D1 DE60318069 D1 DE 60318069D1 DE 60318069 T DE60318069 T DE 60318069T DE 60318069 T DE60318069 T DE 60318069T DE 60318069 D1 DE60318069 D1 DE 60318069D1
Authority
DE
Germany
Prior art keywords
circuit
direct access
access mode
embedded dram
dram circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60318069T
Other languages
English (en)
Inventor
Thomas Boehler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Application granted granted Critical
Publication of DE60318069D1 publication Critical patent/DE60318069D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/14—Implementation of control logic, e.g. test mode decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/72—Masking faults in memories by using spares or by reconfiguring with optimized replacement algorithms
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/814—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout for optimized yield
DE60318069T 2002-09-11 2003-09-11 Schaltung und verfahren zum prüfen eingebetteter dram-schaltungen durch direktzugriffsmodus Expired - Fee Related DE60318069D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/241,032 US7171596B2 (en) 2002-09-11 2002-09-11 Circuit and method for testing embedded DRAM circuits through direct access mode
PCT/EP2003/010134 WO2004025663A2 (en) 2002-09-11 2003-09-11 Circuit and method for testing embedded dram circuits through direct access mode

Publications (1)

Publication Number Publication Date
DE60318069D1 true DE60318069D1 (de) 2008-01-24

Family

ID=31991082

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60318069T Expired - Fee Related DE60318069D1 (de) 2002-09-11 2003-09-11 Schaltung und verfahren zum prüfen eingebetteter dram-schaltungen durch direktzugriffsmodus

Country Status (6)

Country Link
US (1) US7171596B2 (de)
EP (1) EP1537586B1 (de)
JP (1) JP2006512698A (de)
CN (1) CN100466107C (de)
DE (1) DE60318069D1 (de)
WO (1) WO2004025663A2 (de)

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US7356741B2 (en) * 2002-11-26 2008-04-08 Infineon Technologies Ag Modular test controller with BIST circuit for testing embedded DRAM circuits
US7159145B2 (en) * 2003-05-12 2007-01-02 Infineon Technologies Ag Built-in self test system and method
US7370249B2 (en) * 2004-06-22 2008-05-06 Intel Corporation Method and apparatus for testing a memory array
US7263638B2 (en) * 2004-12-16 2007-08-28 Infineon Technologies Ag Memory having test circuit
US7562271B2 (en) 2005-09-26 2009-07-14 Rambus Inc. Memory system topologies including a buffer device and an integrated circuit memory device
US11328764B2 (en) 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US7624316B2 (en) * 2005-12-23 2009-11-24 Intel Corporation Apparatus and method for testing removable flash memory devices
US7802157B2 (en) * 2006-06-22 2010-09-21 Micron Technology, Inc. Test mode for multi-chip integrated circuit packages
KR100881622B1 (ko) * 2006-11-14 2009-02-04 삼성전자주식회사 멀티칩 및 그것의 테스트 방법
KR101321947B1 (ko) * 2007-09-20 2013-11-04 삼성전자주식회사 정전기 방전 보호회로를 구비하는 반도체 장치 및 이장치의 테스트 방법
US7816934B2 (en) * 2007-10-16 2010-10-19 Micron Technology, Inc. Reconfigurable connections for stacked semiconductor devices
US7716542B2 (en) * 2007-11-13 2010-05-11 Faraday Technology Corp. Programmable memory built-in self-test circuit and clock switching circuit thereof
US8521979B2 (en) 2008-05-29 2013-08-27 Micron Technology, Inc. Memory systems and methods for controlling the timing of receiving read data
US7979757B2 (en) * 2008-06-03 2011-07-12 Micron Technology, Inc. Method and apparatus for testing high capacity/high bandwidth memory devices
US8756486B2 (en) 2008-07-02 2014-06-17 Micron Technology, Inc. Method and apparatus for repairing high capacity/high bandwidth memory devices
US7855931B2 (en) 2008-07-21 2010-12-21 Micron Technology, Inc. Memory system and method using stacked memory device dice, and system using the memory system
US8289760B2 (en) 2008-07-02 2012-10-16 Micron Technology, Inc. Multi-mode memory device and method having stacked memory dice, a logic die and a command processing circuit and operating in direct and indirect modes
US8127204B2 (en) 2008-08-15 2012-02-28 Micron Technology, Inc. Memory system and method using a memory device die stacked with a logic die using data encoding, and system using the memory system
CN101458971B (zh) * 2008-12-02 2013-01-09 炬力集成电路设计有限公司 一种嵌入式静态存储器的测试系统及测试方法
CN102081972B (zh) * 2009-11-27 2015-05-20 上海华虹集成电路有限责任公司 一种eeprom器件测试电路及其测试方法
US8400808B2 (en) 2010-12-16 2013-03-19 Micron Technology, Inc. Phase interpolators and push-pull buffers
CN103021467B (zh) * 2011-09-27 2016-09-07 意法半导体研发(深圳)有限公司 故障诊断电路
JP6063679B2 (ja) * 2012-09-10 2017-01-18 ルネサスエレクトロニクス株式会社 半導体装置
US9171597B2 (en) 2013-08-30 2015-10-27 Micron Technology, Inc. Apparatuses and methods for providing strobe signals to memories
US9548137B2 (en) * 2013-12-26 2017-01-17 Intel Corporation Integrated circuit defect detection and repair
US9564245B2 (en) * 2013-12-26 2017-02-07 Intel Corporation Integrated circuit defect detection and repair
US9514844B2 (en) * 2014-08-26 2016-12-06 Globalfoundries Inc. Fast auto shift of failing memory diagnostics data using pattern detection
US20180373653A1 (en) * 2017-06-21 2018-12-27 Hewlett Packard Enterprise Development Lp Commitment of acknowledged data in response to request to commit
CN110892483B (zh) * 2019-10-17 2021-01-29 长江存储科技有限责任公司 采用有限数量的测试引脚测试存储器件的方法以及利用该方法的存储器件

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Publication number Priority date Publication date Assignee Title
US4481627A (en) 1981-10-30 1984-11-06 Honeywell Information Systems Inc. Embedded memory testing method and apparatus
US5249281A (en) 1990-10-12 1993-09-28 Lsi Logic Corporation Testable ram architecture in a microprocessor having embedded cache memory
US6044481A (en) 1997-05-09 2000-03-28 Artisan Components, Inc. Programmable universal test interface for testing memories with different test methodologies
US6286115B1 (en) 1998-06-29 2001-09-04 Micron Technology, Inc. On-chip testing circuit and method for integrated circuits
GR990100210A (el) 1999-06-23 2001-02-28 I.S.D. Ενσωματωμενες δομες αυτοελεγχου και αλγοριθμοι ελεγχου για μνημες τυχαιας προσπελασης
US6496947B1 (en) * 1999-10-25 2002-12-17 Lsi Logic Corporation Built-in self repair circuit with pause for data retention coverage
JP2001167600A (ja) 1999-12-07 2001-06-22 Nec Corp 半導体集積回路、半導体集積回路の製造方法および半導体集積回路の試験方法
US6668347B1 (en) * 2000-05-08 2003-12-23 Intel Corporation Built-in self-testing for embedded memory
US6901542B2 (en) * 2001-08-09 2005-05-31 International Business Machines Corporation Internal cache for on chip test data storage

Also Published As

Publication number Publication date
EP1537586B1 (de) 2007-12-12
WO2004025663A2 (en) 2004-03-25
CN100466107C (zh) 2009-03-04
CN1682314A (zh) 2005-10-12
EP1537586A2 (de) 2005-06-08
US7171596B2 (en) 2007-01-30
JP2006512698A (ja) 2006-04-13
WO2004025663A3 (en) 2004-04-29
US20040049720A1 (en) 2004-03-11

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

8332 No legal effect for de
8370 Indication of lapse of patent is to be deleted
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee