DE60223781D1 - Pegelschieberschaltung zur Übertragung eines Signales von der Abstiegsflanke bis zur abfallenden Flanke eines Eingangssignales - Google Patents

Pegelschieberschaltung zur Übertragung eines Signales von der Abstiegsflanke bis zur abfallenden Flanke eines Eingangssignales

Info

Publication number
DE60223781D1
DE60223781D1 DE60223781T DE60223781T DE60223781D1 DE 60223781 D1 DE60223781 D1 DE 60223781D1 DE 60223781 T DE60223781 T DE 60223781T DE 60223781 T DE60223781 T DE 60223781T DE 60223781 D1 DE60223781 D1 DE 60223781D1
Authority
DE
Germany
Prior art keywords
falling edge
signal
transmitting
level shifter
shifter circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60223781T
Other languages
English (en)
Other versions
DE60223781T2 (de
Inventor
Ryuta Okamoto
Kyoichi Takenaka
Akihiko Yoshizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE60223781D1 publication Critical patent/DE60223781D1/de
Publication of DE60223781T2 publication Critical patent/DE60223781T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE60223781T 2001-12-19 2002-12-17 Pegelschieberschaltung zur Übertragung eines Signales von der Abstiegsflanke bis zur abfallenden Flanke eines Eingangssignales Expired - Lifetime DE60223781T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001386703A JP3696157B2 (ja) 2001-12-19 2001-12-19 レベルシフト回路
JP2001386703 2001-12-19

Publications (2)

Publication Number Publication Date
DE60223781D1 true DE60223781D1 (de) 2008-01-10
DE60223781T2 DE60223781T2 (de) 2008-10-30

Family

ID=19187962

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60223781T Expired - Lifetime DE60223781T2 (de) 2001-12-19 2002-12-17 Pegelschieberschaltung zur Übertragung eines Signales von der Abstiegsflanke bis zur abfallenden Flanke eines Eingangssignales

Country Status (6)

Country Link
US (1) US6784719B2 (de)
EP (1) EP1326342B1 (de)
JP (1) JP3696157B2 (de)
CN (1) CN1263129C (de)
DE (1) DE60223781T2 (de)
TW (1) TW580793B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100917009B1 (ko) * 2003-02-10 2009-09-10 삼성전자주식회사 트랜지스터의 구동 방법과 쉬프트 레지스터의 구동 방법및 이를 수행하기 위한 쉬프트 레지스터
TW580787B (en) * 2003-03-14 2004-03-21 Novatek Microelectronics Corp Slew rate enhancement device and slew rate enhancement method
US6838924B1 (en) * 2003-04-25 2005-01-04 Xilinx, Inc. Dual stage level shifter for low voltage operation
US7053657B1 (en) 2003-06-26 2006-05-30 Cypress Semiconductor Corporation Dynamically biased wide swing level shifting circuit for high speed voltage protection input/outputs
US7190206B2 (en) * 2003-07-22 2007-03-13 Samsung Electronics Co., Ltd. Interface circuit and signal clamping circuit using level-down shifter
JP4487559B2 (ja) * 2003-12-18 2010-06-23 株式会社ニコン レベルシフト回路、並びに、これを用いたアクチュエータ装置及び光スイッチシステム
US7005910B2 (en) * 2004-01-16 2006-02-28 Arm Physical Ip, Inc. Feed-forward circuit for reducing delay through an input buffer
DE102004054546B4 (de) * 2004-11-11 2011-06-22 Qimonda AG, 81739 Treiberschaltung
WO2006126728A1 (en) 2005-05-27 2006-11-30 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2007006464A (ja) * 2005-05-27 2007-01-11 Semiconductor Energy Lab Co Ltd 半導体装置
TWI278183B (en) 2005-07-01 2007-04-01 Au Optronics Corp Shift register and level shifter thereof
TWI313968B (en) 2006-07-04 2009-08-21 Au Optronics Corp Vevel shifter circuit
TWI349438B (en) * 2008-05-09 2011-09-21 Au Optronics Corp Level shifter
JP5295889B2 (ja) * 2009-07-07 2013-09-18 株式会社東芝 レベル変換回路
TWI477953B (zh) * 2010-08-31 2015-03-21 Richwave Technology Corp 電源開啟／重置電路與相關控制數位電路之開啟／重置狀態的方法
CN102684651B (zh) * 2012-05-25 2015-07-08 华为技术有限公司 用于数字电路的信号延迟方法、装置及数字电路系统
US9425771B2 (en) * 2014-09-26 2016-08-23 Texas Instruments Incorporated Low area flip-flop with a shared inverter
WO2016084995A1 (ko) 2014-11-26 2016-06-02 주식회사 실리콘웍스 개선된 시간 응답 특성을 가지는 패스 스위치 회로 및 그 제어 방법
CN105981300B (zh) * 2015-01-13 2019-07-26 硅工厂股份有限公司 具有改善的时间响应特性的电平移位电路及其控制方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4232049C1 (de) * 1992-09-24 1994-05-19 Siemens Ag Integrierte Halbleiterschaltungsanordnung
US5486785A (en) 1994-09-30 1996-01-23 Mitsubishi Semiconductor America, Inc. CMOS level shifter with feedforward control to prevent latching in a wrong logic state
JPH08330939A (ja) 1995-06-05 1996-12-13 Toshiba Microelectron Corp レベルシフタ回路
GB2314709B (en) * 1996-06-24 2000-06-28 Hyundai Electronics Ind Skew logic circuit device
JP3705880B2 (ja) * 1996-11-28 2005-10-12 富士通株式会社 レベルコンバータ及び半導体装置
JPH10326489A (ja) * 1997-05-26 1998-12-08 Mitsubishi Electric Corp 半導体集積回路装置
US6025738A (en) * 1997-08-22 2000-02-15 International Business Machines Corporation Gain enhanced split drive buffer
US5952868A (en) * 1997-09-18 1999-09-14 Cypress Semiconductor Corp. Voltage level interface circuit with set-up and hold control
JP3684109B2 (ja) 1999-06-30 2005-08-17 株式会社東芝 電圧制御発振回路
KR100379610B1 (ko) * 2001-04-18 2003-04-08 삼성전자주식회사 전압 레벨 차이로 인한 누설 전류를 효과적으로 차단할 수있는 전압 레벨 변환 장치를 구비한 온-칩 시스템

Also Published As

Publication number Publication date
EP1326342B1 (de) 2007-11-28
TW200306073A (en) 2003-11-01
CN1428859A (zh) 2003-07-09
TW580793B (en) 2004-03-21
JP2003188709A (ja) 2003-07-04
US20030137336A1 (en) 2003-07-24
DE60223781T2 (de) 2008-10-30
JP3696157B2 (ja) 2005-09-14
EP1326342A1 (de) 2003-07-09
US6784719B2 (en) 2004-08-31
CN1263129C (zh) 2006-07-05

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Legal Events

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