DE602006014171D1 - Rail-to-rail-verzögerungsleitung für zeit-analog-digital-umsetzer - Google Patents
Rail-to-rail-verzögerungsleitung für zeit-analog-digital-umsetzerInfo
- Publication number
- DE602006014171D1 DE602006014171D1 DE602006014171T DE602006014171T DE602006014171D1 DE 602006014171 D1 DE602006014171 D1 DE 602006014171D1 DE 602006014171 T DE602006014171 T DE 602006014171T DE 602006014171 T DE602006014171 T DE 602006014171T DE 602006014171 D1 DE602006014171 D1 DE 602006014171D1
- Authority
- DE
- Germany
- Prior art keywords
- analog
- rail
- time
- digital
- delay
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
-
- G—PHYSICS
- G04—HOROLOGY
- G04F—TIME-INTERVAL MEASURING
- G04F10/00—Apparatus for measuring unknown time intervals by electric means
- G04F10/005—Time-to-digital converters [TDC]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/18—Automatic control for modifying the range of signals the converter can handle, e.g. gain ranging
- H03M1/188—Multi-path, i.e. having a separate analogue/digital converter for each possible range
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/50—Analogue/digital converters with intermediate conversion to time interval
- H03M1/502—Analogue/digital converters with intermediate conversion to time interval using tapped delay lines
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Analogue/Digital Conversion (AREA)
- Pulse Circuits (AREA)
- Networks Using Active Elements (AREA)
- Metal Rolling (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/197,172 US7106239B1 (en) | 2005-08-03 | 2005-08-03 | Rail-to-rail delay line for time analog-to-digital converters |
PCT/US2006/030400 WO2007019288A1 (en) | 2005-08-03 | 2006-08-03 | Rail-to-rail delay line for time analog-to-digital converters |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602006014171D1 true DE602006014171D1 (de) | 2010-06-17 |
Family
ID=36951816
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602006014171T Active DE602006014171D1 (de) | 2005-08-03 | 2006-08-03 | Rail-to-rail-verzögerungsleitung für zeit-analog-digital-umsetzer |
Country Status (8)
Country | Link |
---|---|
US (1) | US7106239B1 (de) |
EP (1) | EP1922813B1 (de) |
JP (1) | JP2009504103A (de) |
KR (1) | KR100972370B1 (de) |
CN (1) | CN101233691A (de) |
AT (1) | ATE467159T1 (de) |
DE (1) | DE602006014171D1 (de) |
WO (1) | WO2007019288A1 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6958721B2 (en) * | 2003-09-18 | 2005-10-25 | The Regents Of The University Of Colorado | Matched delay line voltage converter |
JP2007104475A (ja) * | 2005-10-06 | 2007-04-19 | Denso Corp | A/d変換方法及び装置 |
JP5055471B2 (ja) * | 2006-02-17 | 2012-10-24 | アドバンテスト (シンガポール) プライベート リミテッド | 遅延素子の遅延寄与決定を有する時間−デジタル変換 |
WO2007093221A1 (en) * | 2006-02-17 | 2007-08-23 | Verigy (Singapore) Pte. Ltd. | Time-to-digital conversion with calibration pulse injection |
US7755017B2 (en) * | 2006-10-13 | 2010-07-13 | Sony Corporation | Solid-image-pickup device, image-pickup device, and method of driving solid-image-pickup device |
TWI399088B (zh) * | 2007-10-12 | 2013-06-11 | Sony Corp | 資料處理器,固態成像裝置,成像裝置,及電子設備 |
JP4921329B2 (ja) * | 2007-11-28 | 2012-04-25 | 株式会社デンソー | A/d変換回路 |
JP2009200931A (ja) * | 2008-02-22 | 2009-09-03 | Panasonic Corp | 固体撮像装置、半導体集積回路装置、および信号処理方法 |
JP5086937B2 (ja) * | 2008-08-19 | 2012-11-28 | ルネサスエレクトロニクス株式会社 | パルス位相差検出回路及びこれを用いたa/d変換回路 |
US8098085B2 (en) | 2009-03-30 | 2012-01-17 | Qualcomm Incorporated | Time-to-digital converter (TDC) with improved resolution |
JP5340838B2 (ja) * | 2009-07-16 | 2013-11-13 | オリンパス株式会社 | 時間ad変換器及び固体撮像装置 |
KR101081366B1 (ko) | 2009-09-23 | 2011-11-08 | 포항공과대학교 산학협력단 | 아날로그 디지털 변환기의 시간영역 전압 비교기 |
US8314726B2 (en) * | 2010-04-07 | 2012-11-20 | Imec | Time stamp generation |
EP2388923B1 (de) | 2010-05-21 | 2013-12-04 | Stichting IMEC Nederland | Asynchroner Analog-Digital-Wandler mit digitaler Steigung und Verfahren dafür |
US8193963B2 (en) * | 2010-09-02 | 2012-06-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and system for time to digital conversion with calibration and correction loops |
JP5780356B2 (ja) * | 2012-03-27 | 2015-09-16 | 富士通株式会社 | 時間対デジタル変換器、および制御方法 |
JP6085523B2 (ja) * | 2013-05-30 | 2017-02-22 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の動作方法 |
US9035815B1 (en) * | 2014-03-04 | 2015-05-19 | Xilinx, Inc. | High-speed and high-resolution signal analysis system |
JP6819114B2 (ja) | 2016-07-25 | 2021-01-27 | セイコーエプソン株式会社 | コンパレーター、回路装置、物理量センサー、電子機器及び移動体 |
JP6776691B2 (ja) * | 2016-07-25 | 2020-10-28 | セイコーエプソン株式会社 | 回路装置、電子機器、物理量センサー及び移動体 |
CN109884873B (zh) * | 2018-04-23 | 2021-10-29 | 南京邮电大学 | 一种采用动态阈值技术的时间数字转换器 |
CN109765778B (zh) * | 2018-12-07 | 2020-10-02 | 南京邮电大学 | 一种时间-模拟转换电路及单光子飞行时间测量方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3064644B2 (ja) * | 1992-03-16 | 2000-07-12 | 株式会社デンソー | A/d変換回路 |
JPH11196431A (ja) * | 1997-12-26 | 1999-07-21 | Fujitsu General Ltd | 2重ループpll回路及びこのpll回路を用いた色復調回路 |
KR20000044544A (ko) * | 1998-12-30 | 2000-07-15 | 김영환 | 신호의 위상차를 양자화하기 위한 회로 |
JP4396063B2 (ja) * | 2001-07-13 | 2010-01-13 | 株式会社デンソー | A/d変換方法及び装置 |
JP3775258B2 (ja) * | 2001-07-31 | 2006-05-17 | 株式会社デンソー | フィルタリング方法及びフィルタ機能を有するa/d変換装置 |
US6958721B2 (en) * | 2003-09-18 | 2005-10-25 | The Regents Of The University Of Colorado | Matched delay line voltage converter |
-
2005
- 2005-08-03 US US11/197,172 patent/US7106239B1/en not_active Expired - Fee Related
-
2006
- 2006-08-03 KR KR1020087005251A patent/KR100972370B1/ko not_active IP Right Cessation
- 2006-08-03 EP EP06789378A patent/EP1922813B1/de not_active Not-in-force
- 2006-08-03 CN CNA2006800284384A patent/CN101233691A/zh active Pending
- 2006-08-03 JP JP2008525215A patent/JP2009504103A/ja active Pending
- 2006-08-03 AT AT06789378T patent/ATE467159T1/de not_active IP Right Cessation
- 2006-08-03 DE DE602006014171T patent/DE602006014171D1/de active Active
- 2006-08-03 WO PCT/US2006/030400 patent/WO2007019288A1/en active Application Filing
Also Published As
Publication number | Publication date |
---|---|
US7106239B1 (en) | 2006-09-12 |
ATE467159T1 (de) | 2010-05-15 |
KR20080040757A (ko) | 2008-05-08 |
CN101233691A (zh) | 2008-07-30 |
KR100972370B1 (ko) | 2010-07-26 |
EP1922813A1 (de) | 2008-05-21 |
EP1922813B1 (de) | 2010-05-05 |
WO2007019288A1 (en) | 2007-02-15 |
JP2009504103A (ja) | 2009-01-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |