DE602006011431D1 - Mehrschwellige mos-schaltungen - Google Patents

Mehrschwellige mos-schaltungen

Info

Publication number
DE602006011431D1
DE602006011431D1 DE602006011431T DE602006011431T DE602006011431D1 DE 602006011431 D1 DE602006011431 D1 DE 602006011431D1 DE 602006011431 T DE602006011431 T DE 602006011431T DE 602006011431 T DE602006011431 T DE 602006011431T DE 602006011431 D1 DE602006011431 D1 DE 602006011431D1
Authority
DE
Germany
Prior art keywords
transistors
lvt
latch
threshold
hvt
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602006011431T
Other languages
English (en)
Inventor
Sumant Ramprasad
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of DE602006011431D1 publication Critical patent/DE602006011431D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE602006011431T 2005-01-10 2006-01-09 Mehrschwellige mos-schaltungen Active DE602006011431D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US64293405P 2005-01-10 2005-01-10
US11/120,388 US7248090B2 (en) 2005-01-10 2005-05-02 Multi-threshold MOS circuits
PCT/US2006/000605 WO2006076262A1 (en) 2005-01-10 2006-01-09 Multi-threshold mos circuits

Publications (1)

Publication Number Publication Date
DE602006011431D1 true DE602006011431D1 (de) 2010-02-11

Family

ID=36204331

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602006011431T Active DE602006011431D1 (de) 2005-01-10 2006-01-09 Mehrschwellige mos-schaltungen

Country Status (7)

Country Link
US (1) US7248090B2 (de)
EP (1) EP1847017B1 (de)
JP (1) JP2008527863A (de)
KR (1) KR100925132B1 (de)
AT (1) ATE453956T1 (de)
DE (1) DE602006011431D1 (de)
WO (1) WO2006076262A1 (de)

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JP2005151170A (ja) * 2003-11-14 2005-06-09 Renesas Technology Corp 半導体集積回路
US20070085585A1 (en) * 2005-10-13 2007-04-19 Arm Limited Data retention in operational and sleep modes
US7391249B2 (en) * 2005-12-07 2008-06-24 Electronics And Telecommunications Research Institute Multi-threshold CMOS latch circuit
US20070147572A1 (en) * 2005-12-28 2007-06-28 Intel Corporation Registers for an enhanced idle architectural state
US7405606B2 (en) * 2006-04-03 2008-07-29 Intellectual Ventures Fund 27 Llc D flip-flop
US20070273420A1 (en) * 2006-05-23 2007-11-29 Pavan Vithal Torvi Method and apparatus for a low standby-power flip-flop
US7609094B2 (en) * 2006-06-23 2009-10-27 Mediatek Inc. Input circuits and methods thereof
KR20090027042A (ko) * 2007-09-11 2009-03-16 주식회사 동부하이텍 리텐션 기능을 갖는 ｍｔｃｍｏｓ 플립플롭
JP5050799B2 (ja) * 2007-11-16 2012-10-17 富士電機株式会社 スイッチング制御回路および該スイッチング制御回路を用いるａｃ／ｄｃコンバータ
US8076965B2 (en) * 2008-04-10 2011-12-13 Broadcom Corporation Low leakage data retention flip flop
US8390331B2 (en) * 2009-12-29 2013-03-05 Nxp B.V. Flexible CMOS library architecture for leakage power and variability reduction
US8471618B2 (en) * 2010-04-12 2013-06-25 Mediatek Inc. Flip-flop for low swing clock signal
US8253464B2 (en) * 2010-04-30 2012-08-28 Stmicroelectronics International N.V. Multi-threshold complementary metal-oxide semiconductor master slave flip-flop
JP2013009285A (ja) * 2010-08-26 2013-01-10 Semiconductor Energy Lab Co Ltd 信号処理回路及びその駆動方法
JP5704600B2 (ja) 2010-11-26 2015-04-22 ルネサスエレクトロニクス株式会社 半導体集積回路
DE102011004310B3 (de) * 2011-02-17 2012-04-26 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Schieberegister und Einer-Aus-Vielen-Schieberegister
US9235047B2 (en) * 2011-06-01 2016-01-12 Pixtronix, Inc. MEMS display pixel control circuits and methods
US9112489B2 (en) 2012-05-30 2015-08-18 Freescale Semiconductor, Inc. Sequential logic circuit and method of providing setup timing violation tolerance therefor
US20140002161A1 (en) * 2012-07-02 2014-01-02 Klaus Von Arnim Circuit arrangement, a retention flip-flop, and methods for operating a circuit arrangement and a retention flip-flop
US10102889B2 (en) 2012-09-10 2018-10-16 Texas Instruments Incorporated Processing device with nonvolatile logic array backup
KR102116722B1 (ko) 2013-10-16 2020-06-01 삼성전자 주식회사 반도체 회로 및 반도체 시스템
US9094011B2 (en) * 2013-11-27 2015-07-28 Samsung Electronics Co., Ltd. Power gate switch architecture
KR101699241B1 (ko) * 2015-08-18 2017-01-25 (주)에이디테크놀로지 저전력, 고속 처리가 가능한 플립플랍 회로
US10181842B2 (en) * 2015-11-18 2019-01-15 Nvidia Corporation Mixed threshold flip-flop element to mitigate hold time penalty due to clock distortion
US10430302B2 (en) * 2017-04-12 2019-10-01 Qualcomm Incorporated Data retention with data migration
TWI674754B (zh) * 2018-12-28 2019-10-11 新唐科技股份有限公司 資料保持電路
US11398814B2 (en) * 2020-03-09 2022-07-26 Intel Corporation Low-power single-edge triggered flip-flop, and time borrowing internally stitched flip-flop
KR20220046035A (ko) 2020-10-06 2022-04-14 삼성전자주식회사 반도체 장치
JP2023034195A (ja) 2021-08-30 2023-03-13 キオクシア株式会社 フリップフロップ回路、及び非同期受け回路
WO2023249966A1 (en) * 2022-06-21 2023-12-28 Sehat Sutardja Ultra-low power d flip-flop with reduced clock load

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224319A (ja) * 1984-04-20 1985-11-08 Seiko Epson Corp フリツプ・フロツプ回路
JPH05206792A (ja) * 1992-01-30 1993-08-13 Nec Ic Microcomput Syst Ltd フリップフロップ回路
JPH08256044A (ja) * 1995-03-16 1996-10-01 Nippon Telegr & Teleph Corp <Ntt> 記憶回路およびフリップフロップ回路
JPH09261013A (ja) * 1996-03-19 1997-10-03 Fujitsu Ltd Ｄフリップフロップ回路
US5982211A (en) * 1997-03-31 1999-11-09 Texas Instruments Incorporated Hybrid dual threshold transistor registers
JP3737240B2 (ja) * 1997-04-24 2006-01-18 富士通株式会社 半導体集積回路装置
US6246266B1 (en) * 1999-09-24 2001-06-12 Texas Instruments Incorporated Dynamic logic circuits using selected transistors connected to absolute voltages and additional selected transistors connected to selectively disabled voltages
JP3587299B2 (ja) * 2000-07-12 2004-11-10 沖電気工業株式会社 半導体集積回路
US6492854B1 (en) * 2001-08-30 2002-12-10 Hewlett Packard Company Power efficient and high performance flip-flop
US6538471B1 (en) * 2001-10-10 2003-03-25 International Business Machines Corporation Multi-threshold flip-flop circuit having an outside feedback
JP4406519B2 (ja) * 2001-12-03 2010-01-27 株式会社日立製作所 半導体集積回路装置
US6794914B2 (en) * 2002-05-24 2004-09-21 Qualcomm Incorporated Non-volatile multi-threshold CMOS latch with leakage control
KR100519787B1 (ko) * 2002-11-07 2005-10-10 삼성전자주식회사 슬립 모드에서 데이터 보존이 가능한 ｍｔｃｍｏｓ플립플롭 회로
JP4122954B2 (ja) * 2002-12-06 2008-07-23 沖電気工業株式会社 半導体集積回路
US7227383B2 (en) * 2004-02-19 2007-06-05 Mosaid Delaware, Inc. Low leakage and data retention circuitry

Also Published As

Publication number Publication date
KR20070101311A (ko) 2007-10-16
JP2008527863A (ja) 2008-07-24
KR100925132B1 (ko) 2009-11-05
WO2006076262A1 (en) 2006-07-20
US20060152267A1 (en) 2006-07-13
EP1847017B1 (de) 2009-12-30
EP1847017A1 (de) 2007-10-24
US7248090B2 (en) 2007-07-24
ATE453956T1 (de) 2010-01-15

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