DE602005025135D1 - Spannungs-direktzugriffsspeicher (vram) - Google Patents

Spannungs-direktzugriffsspeicher (vram)

Info

Publication number
DE602005025135D1
DE602005025135D1 DE602005025135T DE602005025135T DE602005025135D1 DE 602005025135 D1 DE602005025135 D1 DE 602005025135D1 DE 602005025135 T DE602005025135 T DE 602005025135T DE 602005025135 T DE602005025135 T DE 602005025135T DE 602005025135 D1 DE602005025135 D1 DE 602005025135D1
Authority
DE
Germany
Prior art keywords
vram
access memory
voltage
random access
direct access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005025135T
Other languages
English (en)
Inventor
Michael P Anthony
Lawrence J Kushner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kenet LLC
Original Assignee
Kenet LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kenet LLC filed Critical Kenet LLC
Publication of DE602005025135D1 publication Critical patent/DE602005025135D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/78—Simultaneous conversion using ladder network
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/78—Simultaneous conversion using ladder network
    • H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/02—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding parasitic signals
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/16—Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/10—Calibration or testing
    • H03M1/1009—Calibration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/662—Multiplexed conversion systems
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H03M1/682—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits both converters being of the unary decoded type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/76—Simultaneous conversion using switching tree
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/74—Simultaneous conversion
    • H03M1/76—Simultaneous conversion using switching tree
    • H03M1/765—Simultaneous conversion using switching tree using a single level of switches which are controlled by unary decoded digital signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Static Random-Access Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Vehicle Body Suspensions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE602005025135T 2004-07-06 2005-07-06 Spannungs-direktzugriffsspeicher (vram) Active DE602005025135D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US58561004P 2004-07-06 2004-07-06
PCT/US2005/024137 WO2006014558A2 (en) 2004-07-06 2005-07-06 Voltage random access memory (vram)

Publications (1)

Publication Number Publication Date
DE602005025135D1 true DE602005025135D1 (de) 2011-01-13

Family

ID=35787653

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005025135T Active DE602005025135D1 (de) 2004-07-06 2005-07-06 Spannungs-direktzugriffsspeicher (vram)

Country Status (8)

Country Link
US (3) US7079067B2 (de)
EP (1) EP1784917B1 (de)
JP (1) JP5107036B2 (de)
KR (1) KR101185619B1 (de)
AT (1) ATE490602T1 (de)
CA (1) CA2573147C (de)
DE (1) DE602005025135D1 (de)
WO (1) WO2006014558A2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5799751B2 (ja) * 2011-01-31 2015-10-28 ソニー株式会社 電圧発生回路、共振回路、通信装置、通信システム、ワイヤレス充電システム、電源装置、及び、電子機器
US9654136B1 (en) * 2016-02-11 2017-05-16 Qualcomm Incorporated Segmented resistor digital-to-analog converter with resistor recycling

Family Cites Families (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5612121A (en) * 1979-07-10 1981-02-06 Sony Corp D-a converter
JPS5675726A (en) * 1979-11-22 1981-06-23 Sony Corp D-a converter
JPS5944125A (ja) * 1982-09-07 1984-03-12 Toshiba Corp デジタル−アナログ変換器
JPS6037831A (ja) * 1983-08-10 1985-02-27 Hitachi Micro Comput Eng Ltd Ｄ／ａ変換回路及びこれを用いた積分回路
EP0227165B1 (de) * 1985-12-16 1992-09-09 Koninklijke Philips Electronics N.V. Schaltung zur Interpolation zwischen komplementären Spannungen
JPH0824265B2 (ja) * 1988-10-13 1996-03-06 松下電器産業株式会社 Ｄ／ａ変換装置
JPH04103160A (ja) * 1990-08-22 1992-04-06 Ricoh Co Ltd 抵抗回路
JPH0590967A (ja) * 1991-09-25 1993-04-09 Sharp Corp デイジタル／アナログ変換器
US5218362A (en) * 1992-07-02 1993-06-08 National Semiconductor Corporation Multistep analog-to-digital converter with embedded correction data memory for trimming resistor ladders
US5258759A (en) * 1992-10-16 1993-11-02 California Institute Of Technology Method and apparatus for monotonic algorithmic digital-to-analog and analog-to-digital conversion
JPH06268523A (ja) * 1993-03-16 1994-09-22 Toshiba Corp Ｄ／ａ変換器
DE69515036T2 (de) * 1994-06-20 2000-07-13 Daikin Ind Ltd Verfahren zur herstellung von difluormethan
US5579007A (en) * 1994-07-07 1996-11-26 Massachusetts Institute Of Technology Charge-to-digital converter
JP2882371B2 (ja) * 1996-06-14 1999-04-12 日本電気株式会社 基準電圧発生回路
JPH1093436A (ja) * 1996-09-19 1998-04-10 Oki Electric Ind Co Ltd デジタル・アナログ変換回路
US5969657A (en) * 1997-07-22 1999-10-19 Analog Devices, Inc. Digital to analog converter
AU4331899A (en) * 1998-06-05 1999-12-20 Lockheed Martin Corporation Radiation hardened six transistor random access memory and memory device
US5973985A (en) * 1998-08-11 1999-10-26 Stmicroelectronics, Inc. Dual port SRAM cell having pseudo ground line or pseudo power line
US6044010A (en) * 1998-10-05 2000-03-28 National Semiconductor Corporation Five transistor SRAM cell
US6246352B1 (en) * 1999-07-30 2001-06-12 Texas Instruments Incorporated Analog-to-digital converter with flush access to digital-to-analog resistor string
EP1104935A1 (de) * 1999-12-01 2001-06-06 STMicroelectronics S.r.l. Integriertes Bauteil mit Trimmelementen
US6201491B1 (en) * 2000-01-26 2001-03-13 Microchip Technology Incorporated Digitally switched potentiometer having improved linearity and settling time
JP3800925B2 (ja) * 2000-05-15 2006-07-26 日本電気株式会社 磁気ランダムアクセスメモリ回路
JP4712204B2 (ja) * 2001-03-05 2011-06-29 ルネサスエレクトロニクス株式会社 記憶装置
GB0108656D0 (en) * 2001-04-06 2001-05-30 Koninkl Philips Electronics Nv Digital to analogue converter
JP2003309469A (ja) * 2002-04-12 2003-10-31 Thine Electronics Inc 半導体集積回路
US6754123B2 (en) * 2002-10-01 2004-06-22 Hewlett-Packard Development Company, Lp. Adjustable current mode differential amplifier for multiple bias point sensing of MRAM having diode isolation
US6744659B1 (en) * 2002-12-09 2004-06-01 Analog Devices, Inc. Source-biased memory cell array
JP4629971B2 (ja) * 2003-12-11 2011-02-09 株式会社半導体エネルギー研究所 非直線ａ／ｄ変換されたデジタル信号対応のｄ／ａ変換回路及びそれを内蔵した音声信号処理回路及び表示装置
JP4376076B2 (ja) * 2004-01-30 2009-12-02 富士通マイクロエレクトロニクス株式会社 Ｄ／ａ変換器および半導体装置

Also Published As

Publication number Publication date
JP5107036B2 (ja) 2012-12-26
US7079067B2 (en) 2006-07-18
EP1784917A4 (de) 2008-07-02
US20060017593A1 (en) 2006-01-26
CA2573147A1 (en) 2006-02-09
JP2008506218A (ja) 2008-02-28
WO2006014558A2 (en) 2006-02-09
EP1784917B1 (de) 2010-12-01
US20070216561A1 (en) 2007-09-20
US20090085787A1 (en) 2009-04-02
WO2006014558A3 (en) 2006-06-15
CA2573147C (en) 2013-03-26
US7705762B2 (en) 2010-04-27
KR101185619B1 (ko) 2012-09-24
EP1784917A2 (de) 2007-05-16
KR20070058447A (ko) 2007-06-08
ATE490602T1 (de) 2010-12-15
WO2006014558A9 (en) 2007-03-08

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