ATE534994T1 - Sram-reststromreduktionsschaltung - Google Patents

Sram-reststromreduktionsschaltung

Info

Publication number
ATE534994T1
ATE534994T1 AT07761457T AT07761457T ATE534994T1 AT E534994 T1 ATE534994 T1 AT E534994T1 AT 07761457 T AT07761457 T AT 07761457T AT 07761457 T AT07761457 T AT 07761457T AT E534994 T1 ATE534994 T1 AT E534994T1
Authority
AT
Austria
Prior art keywords
memory cell
sram
vth
virtual ground
circuit
Prior art date
Application number
AT07761457T
Other languages
English (en)
Inventor
Michael Zampaglione
Michael Tooher
Original Assignee
Mosaid Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mosaid Technologies Inc filed Critical Mosaid Technologies Inc
Application granted granted Critical
Publication of ATE534994T1 publication Critical patent/ATE534994T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
AT07761457T 2006-04-28 2007-04-27 Sram-reststromreduktionsschaltung ATE534994T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US79613806P 2006-04-28 2006-04-28
PCT/US2007/067633 WO2007127922A1 (en) 2006-04-28 2007-04-27 Sram leakage reduction circuit

Publications (1)

Publication Number Publication Date
ATE534994T1 true ATE534994T1 (de) 2011-12-15

Family

ID=38460578

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07761457T ATE534994T1 (de) 2006-04-28 2007-04-27 Sram-reststromreduktionsschaltung

Country Status (6)

Country Link
US (3) US7684262B2 (de)
EP (1) EP2022056B1 (de)
CN (1) CN101432816A (de)
AT (1) ATE534994T1 (de)
TW (2) TW201426745A (de)
WO (1) WO2007127922A1 (de)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101432816A (zh) * 2006-04-28 2009-05-13 莫塞德技术公司 静态随机存取存储器泄漏减小电路
WO2010026500A1 (en) * 2008-09-02 2010-03-11 Nxp B.V. Static random access memory comprising a current source, and method to put memory cells of such a memory into sleep or write mode using said current source
KR101012056B1 (ko) * 2008-11-28 2011-02-01 한국표준과학연구원 다채널 타원계측 표면 플라즈몬 공명 측정장치
US8134874B2 (en) * 2009-01-16 2012-03-13 Apple Inc. Dynamic leakage control for memory arrays
US20100283445A1 (en) * 2009-02-18 2010-11-11 Freescale Semiconductor, Inc. Integrated circuit having low power mode voltage regulator
US8004924B2 (en) * 2009-02-18 2011-08-23 Atmel Corporation Voltage regulator for memory
US8319548B2 (en) * 2009-02-18 2012-11-27 Freescale Semiconductor, Inc. Integrated circuit having low power mode voltage regulator
US8400819B2 (en) * 2010-02-26 2013-03-19 Freescale Semiconductor, Inc. Integrated circuit having variable memory array power supply voltage
US8225123B2 (en) 2010-05-26 2012-07-17 Freescale Semiconductor, Inc. Method and system for integrated circuit power supply management
US9035629B2 (en) 2011-04-29 2015-05-19 Freescale Semiconductor, Inc. Voltage regulator with different inverting gain stages
US8503221B1 (en) 2011-06-02 2013-08-06 Richard Frederic Hobson SRAM cell with common bit line and source line standby voltage
TWI457935B (zh) * 2011-12-22 2014-10-21 Nat Univ Chung Cheng Suitable for low operating voltage of the memory circuit
US9378805B2 (en) 2012-01-03 2016-06-28 Medtronic, Inc. Stable memory source bias over temperature and method
US9160312B2 (en) * 2012-02-09 2015-10-13 Dust Networks, Inc. Low leakage circuits, devices, and techniques
US10096350B2 (en) 2012-03-07 2018-10-09 Medtronic, Inc. Memory array with flash and random access memory and method therefor, reading data from the flash memory without storing the data in the random access memory
US9053791B2 (en) 2012-03-07 2015-06-09 Medtronic, Inc. Flash memory with integrated ROM memory cells
US9607708B2 (en) 2012-03-07 2017-03-28 Medtronic, Inc. Voltage mode sensing for low power flash memory
CN103700395B (zh) 2012-09-28 2016-12-21 国际商业机器公司 存储器单元
US9760149B2 (en) * 2013-01-08 2017-09-12 Qualcomm Incorporated Enhanced dynamic memory management with intelligent current/power consumption minimization
TWI498892B (zh) * 2013-09-27 2015-09-01 Univ Nat Cheng Kung 靜態隨機存取記憶體之自適應性資料保持電壓調節系統
US9058046B1 (en) 2013-12-16 2015-06-16 International Business Machines Corporation Leakage-aware voltage regulation circuit and method
US9070433B1 (en) 2014-03-11 2015-06-30 International Business Machines Corporation SRAM supply voltage global bitline precharge pulse
JP6370151B2 (ja) * 2014-07-31 2018-08-08 エイブリック株式会社 半導体集積回路装置及びその出力電圧調整方法
US9620200B1 (en) 2016-03-26 2017-04-11 Arm Limited Retention voltages for integrated circuits
CN109308920B (zh) * 2017-07-27 2020-11-13 中芯国际集成电路制造(上海)有限公司 静态随机存取存储器阵列的供电控制电路
US11145359B2 (en) 2019-04-10 2021-10-12 Stmicroelectronics International N.V. Reduced retention leakage SRAM
US10950298B1 (en) * 2020-01-17 2021-03-16 Taiwan Semiconductor Manufacturing Company, Ltd. Mixed threshold voltage memory array
US11946973B1 (en) * 2022-11-29 2024-04-02 Texas Instruments Incorporated Hold time improved low area flip-flop architecture

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5986923A (en) * 1998-05-06 1999-11-16 Hewlett-Packard Company Method and apparatus for improving read/write stability of a single-port SRAM cell
JP3291728B2 (ja) * 1999-03-10 2002-06-10 日本電気株式会社 半導体スタティックメモリ
US6914449B2 (en) 2001-04-02 2005-07-05 Xilinx, Inc. Structure for reducing leakage current in submicron IC devices
US6862207B2 (en) 2002-10-15 2005-03-01 Intel Corporation Static random access memory
US6977519B2 (en) 2003-05-14 2005-12-20 International Business Machines Corporation Digital logic with reduced leakage
US6839299B1 (en) * 2003-07-24 2005-01-04 International Business Machines Corporation Method and structure for reducing gate leakage and threshold voltage fluctuation in memory cells
WO2005057628A2 (en) 2003-12-08 2005-06-23 University Of South Florida A method and apparatus for reducing leakage in integrated circuits
US7020041B2 (en) * 2003-12-18 2006-03-28 Intel Corporation Method and apparatus to clamp SRAM supply voltage
US7372764B2 (en) * 2004-08-11 2008-05-13 Stmicroelectronics Pvt. Ltd. Logic device with reduced leakage current
JP4138718B2 (ja) 2004-08-31 2008-08-27 株式会社東芝 半導体記憶装置
US7099230B1 (en) 2005-04-15 2006-08-29 Texas Instruments Incorporated Virtual ground circuit for reducing SRAM standby power
CN101432816A (zh) * 2006-04-28 2009-05-13 莫塞德技术公司 静态随机存取存储器泄漏减小电路

Also Published As

Publication number Publication date
WO2007127922A1 (en) 2007-11-08
TW200809859A (en) 2008-02-16
US20100232236A1 (en) 2010-09-16
EP2022056A1 (de) 2009-02-11
US20070252623A1 (en) 2007-11-01
EP2022056B1 (de) 2011-11-23
TW201426745A (zh) 2014-07-01
TWI433149B (zh) 2014-04-01
CN101432816A (zh) 2009-05-13
US7684262B2 (en) 2010-03-23
US8077527B2 (en) 2011-12-13
US20120057416A1 (en) 2012-03-08
US8416633B2 (en) 2013-04-09

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