DE602004010287D1 - Testvorrichtung - Google Patents

Testvorrichtung

Info

Publication number
DE602004010287D1
DE602004010287D1 DE602004010287T DE602004010287T DE602004010287D1 DE 602004010287 D1 DE602004010287 D1 DE 602004010287D1 DE 602004010287 T DE602004010287 T DE 602004010287T DE 602004010287 T DE602004010287 T DE 602004010287T DE 602004010287 D1 DE602004010287 D1 DE 602004010287D1
Authority
DE
Germany
Prior art keywords
test device
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004010287T
Other languages
English (en)
Other versions
DE602004010287T2 (de
Inventor
Koichi Yatsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advantest Corp
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advantest Corp filed Critical Advantest Corp
Publication of DE602004010287D1 publication Critical patent/DE602004010287D1/de
Application granted granted Critical
Publication of DE602004010287T2 publication Critical patent/DE602004010287T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31907—Modular tester, e.g. controlling and coordinating instruments in a bus based architecture
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Tests Of Electronic Circuits (AREA)
DE602004010287T 2003-09-03 2004-09-01 Testvorrichtung Expired - Lifetime DE602004010287T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003311746 2003-09-03
JP2003311746 2003-09-03
PCT/JP2004/012653 WO2005024445A1 (ja) 2003-09-03 2004-09-01 試験装置

Publications (2)

Publication Number Publication Date
DE602004010287D1 true DE602004010287D1 (de) 2008-01-03
DE602004010287T2 DE602004010287T2 (de) 2008-11-06

Family

ID=34269712

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004010287T Expired - Lifetime DE602004010287T2 (de) 2003-09-03 2004-09-01 Testvorrichtung

Country Status (8)

Country Link
US (1) US7237159B2 (de)
EP (1) EP1666898B1 (de)
JP (1) JP4351677B2 (de)
KR (1) KR20060073948A (de)
CN (1) CN100456042C (de)
DE (1) DE602004010287T2 (de)
TW (1) TWI340249B (de)
WO (1) WO2005024445A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4350474B2 (ja) * 2003-09-12 2009-10-21 株式会社アドバンテスト 試験装置及び書込制御回路
JP4354235B2 (ja) * 2003-09-12 2009-10-28 株式会社アドバンテスト 試験装置及び調整方法
JP4721762B2 (ja) * 2005-04-25 2011-07-13 株式会社アドバンテスト 試験装置
US7890822B2 (en) * 2006-09-29 2011-02-15 Teradyne, Inc. Tester input/output sharing
US7940595B2 (en) * 2006-12-22 2011-05-10 Sidense Corp. Power up detection system for a memory device
CN101368991B (zh) * 2007-08-15 2012-01-25 鹏智科技(深圳)有限公司 电子装置测试装置及方法
US8010851B2 (en) * 2008-03-31 2011-08-30 Advantest Corporation Testing module, testing apparatus and testing method
JP2015076110A (ja) * 2013-10-08 2015-04-20 マイクロン テクノロジー， インク． 半導体装置及びこれを備えるデータ処理システム
CN109884470B (zh) * 2019-03-11 2022-07-01 苏州腾征智能装备有限公司 精密线缆测试系统

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4359772A (en) * 1980-11-14 1982-11-16 International Business Machines Corporation Dual function error correcting system
JPH0627784B2 (ja) * 1983-11-07 1994-04-13 株式会社日立製作所 Ｉｃ試験装置
US4928278A (en) * 1987-08-10 1990-05-22 Nippon Telegraph And Telephone Corporation IC test system
US5041912A (en) * 1990-01-18 1991-08-20 International Business Machines Corporation Averaging array for CCD imagers
JP3799067B2 (ja) * 1992-06-05 2006-07-19 株式会社日立製作所 Ｉｃ試験装置
US5563661A (en) * 1993-04-05 1996-10-08 Canon Kabushiki Kaisha Image processing apparatus
US5453945A (en) * 1994-01-13 1995-09-26 Tucker; Michael R. Method for decomposing signals into efficient time-frequency representations for data compression and recognition
JP2762977B2 (ja) * 1995-12-15 1998-06-11 日本電気株式会社 半導体集積回路の試験方法及び試験装置
JP3813689B2 (ja) * 1996-07-11 2006-08-23 株式会社東芝 表示装置及びその駆動方法
US5884263A (en) * 1996-09-16 1999-03-16 International Business Machines Corporation Computer note facility for documenting speech training
JPH10170603A (ja) * 1996-12-13 1998-06-26 Ando Electric Co Ltd Ｉｃテスタのキャリブレーション方法
US6055644A (en) * 1997-05-30 2000-04-25 Hewlett-Packard Company Multi-channel architecture with channel independent clock signals
JP4294159B2 (ja) * 1999-05-06 2009-07-08 株式会社ルネサステクノロジ 半導体集積回路装置
US6622103B1 (en) * 2000-06-20 2003-09-16 Formfactor, Inc. System for calibrating timing of an integrated circuit wafer tester
CN1384366A (zh) * 2001-04-29 2002-12-11 株式会社鼎新 基于模块的灵活的半导体测试系统
JP2003156538A (ja) * 2001-11-22 2003-05-30 Advantest Corp 半導体試験装置
JP4332392B2 (ja) * 2003-09-12 2009-09-16 株式会社アドバンテスト 試験装置

Also Published As

Publication number Publication date
DE602004010287T2 (de) 2008-11-06
EP1666898A4 (de) 2006-10-04
EP1666898A1 (de) 2006-06-07
US20050278598A1 (en) 2005-12-15
TWI340249B (en) 2011-04-11
KR20060073948A (ko) 2006-06-29
JP4351677B2 (ja) 2009-10-28
CN1846140A (zh) 2006-10-11
WO2005024445A1 (ja) 2005-03-17
EP1666898B1 (de) 2007-11-21
TW200510743A (en) 2005-03-16
US7237159B2 (en) 2007-06-26
CN100456042C (zh) 2009-01-28
JPWO2005024445A1 (ja) 2007-11-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition