DE60028157D1 - Halbleiteranordnung mit guter Sperrverzögerungsfestigkeit und Verfahren zur Herstellung - Google Patents
Halbleiteranordnung mit guter Sperrverzögerungsfestigkeit und Verfahren zur HerstellungInfo
- Publication number
- DE60028157D1 DE60028157D1 DE60028157T DE60028157T DE60028157D1 DE 60028157 D1 DE60028157 D1 DE 60028157D1 DE 60028157 T DE60028157 T DE 60028157T DE 60028157 T DE60028157 T DE 60028157T DE 60028157 D1 DE60028157 D1 DE 60028157D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacture
- semiconductor device
- reverse recovery
- recovery capability
- good reverse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 238000011084 recovery Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
- H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
- H01L29/744—Gate-turn-off devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Manufacturing & Machinery (AREA)
- Thyristors (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31542799A JP4653273B2 (ja) | 1999-11-05 | 1999-11-05 | 半導体装置、および、その製造方法 |
JP31542799 | 1999-11-05 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60028157D1 true DE60028157D1 (de) | 2006-06-29 |
DE60028157T2 DE60028157T2 (de) | 2006-09-28 |
Family
ID=18065255
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60028157T Expired - Lifetime DE60028157T2 (de) | 1999-11-05 | 2000-10-27 | Halbleiteranordnung mit guter Sperrverzögerungsfestigkeit und Verfahren zur Herstellung |
Country Status (4)
Country | Link |
---|---|
US (1) | US6870199B1 (de) |
EP (1) | EP1098371B1 (de) |
JP (1) | JP4653273B2 (de) |
DE (1) | DE60028157T2 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4653273B2 (ja) | 1999-11-05 | 2011-03-16 | 富士電機システムズ株式会社 | 半導体装置、および、その製造方法 |
GB0130018D0 (en) | 2001-12-15 | 2002-02-06 | Koninkl Philips Electronics Nv | Semiconductor devices and their manufacture |
JP2005340528A (ja) * | 2004-05-27 | 2005-12-08 | Fuji Electric Device Technology Co Ltd | 半導体装置およびその製造方法 |
JP4775539B2 (ja) * | 2005-03-22 | 2011-09-21 | サンケン電気株式会社 | 半導体装置の製法 |
US8669554B2 (en) | 2006-05-10 | 2014-03-11 | Ho-Yuan Yu | Fast recovery reduced p-n junction rectifier |
US7880166B2 (en) * | 2006-05-10 | 2011-02-01 | Ho-Yuan Yu | Fast recovery reduced p-n junction rectifier |
EP2330617A4 (de) | 2008-09-01 | 2012-01-25 | Rohm Co Ltd | Halbleiterbauelement und herstellungsverfahren dafür |
JP2010098189A (ja) * | 2008-10-17 | 2010-04-30 | Toshiba Corp | 半導体装置 |
CN102064202B (zh) * | 2009-11-12 | 2013-01-09 | 上海华虹Nec电子有限公司 | 应用于锗硅三极管的轻掺杂二极管结构 |
JP5450490B2 (ja) * | 2011-03-24 | 2014-03-26 | 株式会社東芝 | 電力用半導体装置 |
DE112012006215B4 (de) | 2012-04-13 | 2020-09-10 | Mitsubishi Electric Corp. | Diode |
JP5549704B2 (ja) * | 2012-04-26 | 2014-07-16 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP6263966B2 (ja) | 2012-12-12 | 2018-01-24 | 富士電機株式会社 | 半導体装置 |
CN103426936B (zh) * | 2013-08-22 | 2015-10-21 | 电子科技大学 | 一种垂直型恒流二极管及其制造方法 |
JP2016100455A (ja) * | 2014-11-21 | 2016-05-30 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
JP6550995B2 (ja) | 2015-07-16 | 2019-07-31 | 富士電機株式会社 | 半導体装置 |
US10867798B2 (en) | 2016-12-08 | 2020-12-15 | Fuji Electric Co., Ltd. | Method of manufacturing semiconductor device |
JP6766885B2 (ja) | 2016-12-08 | 2020-10-14 | 富士電機株式会社 | 半導体装置の製造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3988772A (en) * | 1974-05-28 | 1976-10-26 | General Electric Company | Current isolation means for integrated power devices |
US3988771A (en) * | 1974-05-28 | 1976-10-26 | General Electric Company | Spatial control of lifetime in semiconductor device |
US4165517A (en) * | 1977-02-28 | 1979-08-21 | Electric Power Research Institute, Inc. | Self-protection against breakover turn-on failure in thyristors through selective base lifetime control |
US4567430A (en) * | 1981-09-08 | 1986-01-28 | Recognition Equipment Incorporated | Semiconductor device for automation of integrated photoarray characterization |
US4811072A (en) * | 1982-09-24 | 1989-03-07 | Risberg Robert L | Semiconductor device |
KR930003555B1 (ko) * | 1988-12-16 | 1993-05-06 | 산켄 덴끼 가부시끼가이샤 | 반도체 장치의 제조방법 |
US5243205A (en) * | 1989-10-16 | 1993-09-07 | Kabushiki Kaisha Toshiba | Semiconductor device with overvoltage protective function |
US5210601A (en) * | 1989-10-31 | 1993-05-11 | Kabushiki Kaisha Toshiba | Compression contacted semiconductor device and method for making of the same |
JPH0417372A (ja) * | 1990-05-11 | 1992-01-22 | Hitachi Ltd | 半導体装置 |
FR2664744B1 (fr) * | 1990-07-16 | 1993-08-06 | Sgs Thomson Microelectronics | Diode pin a faible surtension initiale. |
DE4135258C2 (de) * | 1991-10-25 | 1996-05-02 | Semikron Elektronik Gmbh | Schnelle Leistungsdiode |
US5360990A (en) * | 1993-03-29 | 1994-11-01 | Sunpower Corporation | P/N junction device having porous emitter |
JPH07297414A (ja) * | 1994-04-25 | 1995-11-10 | Toshiba Corp | 半導体装置とその製造方法 |
DE69430913D1 (de) * | 1994-07-25 | 2002-08-08 | Cons Ric Microelettronica | Verfahren zur lokalen Reduzierung der Ladungsträgerlebensdauer |
JPH0936388A (ja) | 1995-07-20 | 1997-02-07 | Mitsubishi Electric Corp | 半導体装置 |
US5747371A (en) * | 1996-07-22 | 1998-05-05 | Motorola, Inc. | Method of manufacturing vertical MOSFET |
JP3435166B2 (ja) * | 1997-08-14 | 2003-08-11 | 三菱電機株式会社 | 半導体装置 |
JP4653273B2 (ja) | 1999-11-05 | 2011-03-16 | 富士電機システムズ株式会社 | 半導体装置、および、その製造方法 |
US6627961B1 (en) * | 2000-05-05 | 2003-09-30 | International Rectifier Corporation | Hybrid IGBT and MOSFET for zero current at zero voltage |
-
1999
- 1999-11-05 JP JP31542799A patent/JP4653273B2/ja not_active Expired - Lifetime
-
2000
- 2000-10-27 DE DE60028157T patent/DE60028157T2/de not_active Expired - Lifetime
- 2000-10-27 EP EP00309457A patent/EP1098371B1/de not_active Expired - Lifetime
- 2000-11-03 US US09/705,648 patent/US6870199B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP1098371A3 (de) | 2003-06-25 |
DE60028157T2 (de) | 2006-09-28 |
EP1098371B1 (de) | 2006-05-24 |
EP1098371A2 (de) | 2001-05-09 |
JP4653273B2 (ja) | 2011-03-16 |
JP2001135831A (ja) | 2001-05-18 |
US6870199B1 (en) | 2005-03-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: FUJI ELECTRIC SYSTEMS CO., LTD., TOKYO/TOKIO, JP |