DE60022206T2 - Registerspeicher zur verarbeitung von 2-d matrix - Google Patents

Registerspeicher zur verarbeitung von 2-d matrix Download PDF

Info

Publication number
DE60022206T2
DE60022206T2 DE60022206T DE60022206T DE60022206T2 DE 60022206 T2 DE60022206 T2 DE 60022206T2 DE 60022206 T DE60022206 T DE 60022206T DE 60022206 T DE60022206 T DE 60022206T DE 60022206 T2 DE60022206 T2 DE 60022206T2
Authority
DE
Germany
Prior art keywords
registers
group
matrix
data matrix
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60022206T
Other languages
German (de)
English (en)
Other versions
DE60022206D1 (de
Inventor
K. George CHEN
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE60022206D1 publication Critical patent/DE60022206D1/de
Application granted granted Critical
Publication of DE60022206T2 publication Critical patent/DE60022206T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001—Arithmetic instructions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G06F9/30109—Register structure having multiple operands in a single register
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/3012—Organisation of register space, e.g. banked or distributed register file
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30141—Implementation provisions of register files, e.g. ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Complex Calculations (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
DE60022206T 1999-07-26 2000-06-26 Registerspeicher zur verarbeitung von 2-d matrix Expired - Fee Related DE60022206T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/360,612 US6625721B1 (en) 1999-07-26 1999-07-26 Registers for 2-D matrix processing
US360612 1999-07-26
PCT/US2000/017630 WO2001008005A1 (en) 1999-07-26 2000-06-26 Registers for 2-d matrix processing

Publications (2)

Publication Number Publication Date
DE60022206D1 DE60022206D1 (de) 2005-09-29
DE60022206T2 true DE60022206T2 (de) 2006-03-30

Family

ID=23418740

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60022206T Expired - Fee Related DE60022206T2 (de) 1999-07-26 2000-06-26 Registerspeicher zur verarbeitung von 2-d matrix

Country Status (9)

Country Link
US (1) US6625721B1 (enExample)
EP (1) EP1212677B1 (enExample)
JP (2) JP4979169B2 (enExample)
CN (2) CN1532686B (enExample)
AU (1) AU5640400A (enExample)
DE (1) DE60022206T2 (enExample)
HK (1) HK1043850B (enExample)
TW (1) TWI243332B (enExample)
WO (1) WO2001008005A1 (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020032710A1 (en) * 2000-03-08 2002-03-14 Ashley Saulsbury Processing architecture having a matrix-transpose capability
US6823087B1 (en) * 2001-05-15 2004-11-23 Advanced Micro Devices, Inc. Parallel edge filters in video codec
US7031994B2 (en) * 2001-08-13 2006-04-18 Sun Microsystems, Inc. Matrix transposition in a computer system
US7386703B2 (en) * 2003-11-18 2008-06-10 International Business Machines Corporation Two dimensional addressing of a matrix-vector register array
US20060190517A1 (en) * 2005-02-02 2006-08-24 Guerrero Miguel A Techniques for transposition of a matrix arranged in a memory as multiple items per word
US20070011442A1 (en) * 2005-07-06 2007-01-11 Via Technologies, Inc. Systems and methods of providing indexed load and store operations in a dual-mode computer processing environment
TWI342501B (en) 2006-10-25 2011-05-21 Ind Tech Res Inst Integrated transformation method and device
US8661394B1 (en) 2008-09-24 2014-02-25 Iowa State University Research Foundation, Inc. Depth-optimal mapping of logic chains in reconfigurable fabrics
US8438522B1 (en) 2008-09-24 2013-05-07 Iowa State University Research Foundation, Inc. Logic element architecture for generic logic chains in programmable devices
US8484276B2 (en) * 2009-03-18 2013-07-09 International Business Machines Corporation Processing array data on SIMD multi-core processor architectures
JP5633122B2 (ja) * 2009-06-16 2014-12-03 富士通セミコンダクター株式会社 プロセッサ及び情報処理システム
CN101706760B (zh) * 2009-10-20 2013-07-31 龙芯中科技术有限公司 矩阵转置自动控制电路系统及矩阵转置方法
US8539201B2 (en) * 2009-11-04 2013-09-17 International Business Machines Corporation Transposing array data on SIMD multi-core processor architectures
CN103827814B (zh) * 2011-09-26 2017-04-19 英特尔公司 用于提供利用跨越功能的向量加载操作/存储操作的指令和逻辑
GB2507018B (en) 2011-09-26 2020-04-22 Intel Corp Instruction and logic to provide vector loads and stores with strides and masking functionality
US9292221B2 (en) 2011-09-29 2016-03-22 Intel Corporation Bi-directional copying of register content into shadow registers
US9946541B2 (en) * 2015-12-18 2018-04-17 Intel Corporation Systems, apparatuses, and method for strided access
KR102586173B1 (ko) * 2017-10-31 2023-10-10 삼성전자주식회사 프로세서 및 그 제어 방법
CN111429346A (zh) * 2020-03-16 2020-07-17 广州兴森快捷电路科技有限公司 一种基于fpga的实时视频图像放大方法
CN114546328B (zh) * 2022-03-01 2025-02-11 上海壁仞科技股份有限公司 用于实现数据排列的方法、设备和介质
US12373214B2 (en) 2022-12-28 2025-07-29 Meta Platforms Technologies, Llc Data parallelism

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3763365A (en) * 1972-01-21 1973-10-02 Evans & Sutherland Computer Co Computer graphics matrix multiplier
US4370732A (en) * 1980-09-15 1983-01-25 Ibm Corporation Skewed matrix address generator
JPS6167367A (ja) * 1984-09-10 1986-04-07 Nec Corp 画像制御装置
JPS6238075A (ja) * 1985-08-13 1987-02-19 Fuji Xerox Co Ltd 行列デ−タの転置処理装置
CA1252902A (en) * 1985-10-31 1989-04-18 David R. Pruett Method for rotating a binary image
JPH03160537A (ja) * 1989-11-20 1991-07-10 Fuji Xerox Co Ltd メモリ制御装置
JP2646778B2 (ja) * 1990-01-17 1997-08-27 日本電気株式会社 ディジタル信号処理装置
US5301340A (en) * 1990-10-31 1994-04-05 International Business Machines Corporation IC chips including ALUs and identical register files whereby a number of ALUs directly and concurrently write results to every register file per cycle
JP2964172B2 (ja) * 1991-03-08 1999-10-18 富士通株式会社 Ｄｃｔマトリクス演算回路
JPH0540776A (ja) * 1991-08-02 1993-02-19 Fujitsu Ltd 二次元ｄｃｔマトリクス演算回路
JP3697717B2 (ja) * 1993-09-24 2005-09-21 ソニー株式会社 ２次元離散コサイン変換装置および２次元逆離散コサイン変換装置
JPH07175444A (ja) * 1993-12-20 1995-07-14 Hitachi Ltd 液晶ディスプレイ表示システム
US5481487A (en) 1994-01-28 1996-01-02 Industrial Technology Research Institute Transpose memory for DCT/IDCT circuit
JP2662501B2 (ja) * 1994-02-18 1997-10-15 ホアバンティエンツーグーフウンユーシェンコンシー 離散的コサイン変換及び逆変換のための集積回路プロセッサ
US5668748A (en) * 1995-04-15 1997-09-16 United Microelectronics Corporation Apparatus for two-dimensional discrete cosine transform
JPH08307868A (ja) * 1995-04-28 1996-11-22 Nec Corp 動画像復号装置
GB9509988D0 (en) 1995-05-17 1995-07-12 Sgs Thomson Microelectronics Matrix transposition
KR0175733B1 (ko) * 1995-11-01 1999-04-15 이준 비트-시리얼 메트릭스 전치를 위한 초대규모 집적회로
JPH09214746A (ja) * 1996-02-02 1997-08-15 Ricoh Co Ltd 画像出力システム及び画像形成装置
US5764553A (en) * 1996-02-28 1998-06-09 Lsi Logic Corporation Generalized data processing path for performing transformation and quantization functions for video encoder systems
JPH09312064A (ja) * 1996-05-23 1997-12-02 Victor Co Of Japan Ltd データ変換方式
AU7453396A (en) 1996-10-22 1998-05-15 Philips Electronics North America Corporation System for providing custom operations of a processor for multimedia functions
JP3845920B2 (ja) * 1996-11-26 2006-11-15 ソニー株式会社 行列転置装置
JPH10207868A (ja) * 1997-01-21 1998-08-07 Sharp Corp ２次元配列転置回路
US6292433B1 (en) * 1997-02-03 2001-09-18 Teratech Corporation Multi-dimensional beamforming device
US5938763A (en) * 1997-08-06 1999-08-17 Zenith Electronics Corporation System for transposing data from column order to row order
KR100538605B1 (ko) 1998-03-18 2005-12-22 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 데이터 처리 장치, 행렬 변환 방법 및 컴퓨터 판독가능한 매체
US6175892B1 (en) 1998-06-19 2001-01-16 Hitachi America. Ltd. Registers and methods for accessing registers for use in a single instruction multiple data system

Also Published As

Publication number Publication date
CN1160621C (zh) 2004-08-04
CN1532686A (zh) 2004-09-29
JP5466211B2 (ja) 2014-04-09
DE60022206D1 (de) 2005-09-29
HK1043850A1 (en) 2002-09-27
HK1043850B (en) 2006-02-24
JP2012009055A (ja) 2012-01-12
EP1212677A1 (en) 2002-06-12
AU5640400A (en) 2001-02-13
EP1212677B1 (en) 2005-08-24
CN1532686B (zh) 2012-11-28
WO2001008005A1 (en) 2001-02-01
TWI243332B (en) 2005-11-11
US6625721B1 (en) 2003-09-23
CN1365463A (zh) 2002-08-21
JP4979169B2 (ja) 2012-07-18
JP2003505786A (ja) 2003-02-12

Similar Documents

Publication Publication Date Title
DE60022206T2 (de) Registerspeicher zur verarbeitung von 2-d matrix
DE69430838T2 (de) Schaltung und Verfahren zur parallelen Verschiebung und Addition
DE69230897T2 (de) Diskreter/invers-diskreter Cosinus-Transformationsprozessor und Datenverarbeitungsverfahren
DE3875979T2 (de) Schaltung zur berechnung des quantisierten koeffizienten der diskreten cosinustransformation von digitalen signalabschnitten.
DE69522380T2 (de) Parallel-Verarbeitungsarchitektur für Bildverarbeitung
DE19835216B4 (de) Prozessor und Verfahren zur parallelen Datenverarbeitung
DE60210494T2 (de) Hochgeschwindigkeitsberechnung in einer arithmetik- und logikschaltung
DE3789116T2 (de) Prozessor zur zweidimensionalen diskreten cosinustransformation.
DE69913500T2 (de) Mehrprozessor-Anordnung mit geteiltem Speicherzugriff unter Vorrang-Kontrolle
DE3750017T2 (de) Prozessor für orthogonale Transformation.
DE3882487T2 (de) Vektorprozessor zur schnellen verarbeitung von rekursiven gleichungen.
DE69225839T2 (de) Filtersystem und Verfahren zur Bildverarbeitung mit sehr hoher Geschwindigkeit
DE3687430T2 (de) Schnelle rechnerschaltung fuer die direkte oder umgekehrte cosinustransformation eines diskreten signals.
DE202017103725U1 (de) Blockoperationen für einen Bildprozessor mit einer zweidimensionalen Ausführungsbahnmatrix und einem zweidimensionalen Schieberegister
DE69417309T2 (de) Verfahren und Einrichtung zur Datenübertragung zum Speicher
DE102010048485A1 (de) Textureinheit zur Universalberechnung
DE10393918T5 (de) Effiziente Multiplikation kleiner Matrizen durch Verwendung von SIMD-Registern
DE4403917C2 (de) Vorrichtung zum Berechnen einer Bit-Besetzungszählung
DE69009067T2 (de) Verfahren zur herstellung von digitalsignalprozessoren unter verwendung eines programmierten kompilators.
DE102020102273A1 (de) Effizientes Matrixdatenformat anwendbar für künstliches neuronales Netzwerk
DE102019112186A1 (de) Doppelladebefehl
DE4430195B4 (de) Verfahren zur Auswertung von Booleschen Ausdrücken
DE3854039T2 (de) Bildverarbeitungssystem.
DE102004012516A1 (de) Computersystem zur elektronischen Datenverarbeitung
DE69609931T2 (de) Verfahren zur Datenverarbeitung in matrixförmigen Netzwerken in einem Bewegungsschätzungssystem

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: HEYER, V., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 806

8339 Ceased/non-payment of the annual fee