DE59511107D1 - Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite - Google Patents

Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite

Info

Publication number
DE59511107D1
DE59511107D1 DE59511107T DE59511107T DE59511107D1 DE 59511107 D1 DE59511107 D1 DE 59511107D1 DE 59511107 T DE59511107 T DE 59511107T DE 59511107 T DE59511107 T DE 59511107T DE 59511107 D1 DE59511107 D1 DE 59511107D1
Authority
DE
Germany
Prior art keywords
pane
lacquer
assisted
plasma
front surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE59511107T
Other languages
English (en)
Inventor
Josef Dr Dipl-Ph Mathuni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE59511107T priority Critical patent/DE59511107D1/de
Application granted granted Critical
Publication of DE59511107D1 publication Critical patent/DE59511107D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67069Apparatus for fluid treatment for etching for drying etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
DE59511107T 1994-02-22 1995-02-22 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite Expired - Lifetime DE59511107D1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE59511107T DE59511107D1 (de) 1994-02-22 1995-02-22 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE4405667 1994-02-22
DE19502777A DE19502777A1 (de) 1994-02-22 1995-01-25 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite
DE59511107T DE59511107D1 (de) 1994-02-22 1995-02-22 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite

Publications (1)

Publication Number Publication Date
DE59511107D1 true DE59511107D1 (de) 2010-07-22

Family

ID=6510893

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19502777A Ceased DE19502777A1 (de) 1994-02-22 1995-01-25 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite
DE59511107T Expired - Lifetime DE59511107D1 (de) 1994-02-22 1995-02-22 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE19502777A Ceased DE19502777A1 (de) 1994-02-22 1995-01-25 Verfahren zur plasmaunterstützten Rückseitenätzung einer Halbleiterscheibe bei belackungsfreier Scheibenvorderseite

Country Status (4)

Country Link
US (2) US6013136A (de)
KR (1) KR100392919B1 (de)
DE (2) DE19502777A1 (de)
TW (1) TW295688B (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19505906A1 (de) * 1995-02-21 1996-08-22 Siemens Ag Verfahren zum Damage-Ätzen der Rückseite einer Halbleiterscheibe bei geschützter Scheibenvorderseite
DE19621399A1 (de) * 1996-05-28 1997-12-04 Siemens Ag Verfahren zum Ätzen eines Halbleitersubstrats sowie Ätzanlage
DE19703059A1 (de) * 1997-01-28 1998-09-17 Siemens Ag Vorrichtung und Verfahren zur Halterung und zum Schutz von Halbleiter-Wafern
EP1052682B1 (de) * 1999-04-28 2002-01-09 SEZ Semiconductor-Equipment Zubehör für die Halbleiterfertigung AG Vorrichtung und Verfahren zur Flüssigkeitsbehandlung von scheibenförmigen Gegenständen
US7288465B2 (en) * 2003-04-15 2007-10-30 International Business Machines Corpoartion Semiconductor wafer front side protection
WO2007142618A2 (en) * 2005-06-10 2007-12-13 Albemarle Corporation High concentrated, biocidally active compositions and aqueous mixtures and methods of making the same
US8373086B2 (en) * 2008-04-07 2013-02-12 Charm Engineering Co., Ltd. Plasma processing apparatus and method for plasma processing
JP7289031B2 (ja) * 2017-07-28 2023-06-09 東京エレクトロン株式会社 基板の裏面堆積のシステム及び方法

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3027934A1 (de) * 1980-07-23 1982-02-25 Siemens AG, 1000 Berlin und 8000 München Verfahren zur einseitigen aetzung von halbleiterscheiben
US4849068A (en) * 1985-10-24 1989-07-18 Texas Instruments Incorporated Apparatus and method for plasma-assisted etching
JPH07105370B2 (ja) * 1986-10-08 1995-11-13 ロ−ム株式会社 半導体ウエハの裏面加工方法
JPS63202922A (ja) * 1987-02-18 1988-08-22 Nec Kyushu Ltd 半導体基板洗浄装置
JPH0254751A (ja) * 1988-08-17 1990-02-23 Tadahiro Omi 金属酸化処理装置及び金属酸化処理方法並びに金属装入方法
US4857142A (en) * 1988-09-22 1989-08-15 Fsi International, Inc. Method and apparatus for controlling simultaneous etching of front and back sides of wafers
US5075256A (en) * 1989-08-25 1991-12-24 Applied Materials, Inc. Process for removing deposits from backside and end edge of semiconductor wafer while preventing removal of materials from front surface of wafer
JPH03228321A (ja) * 1990-02-02 1991-10-09 Nec Corp プラズマcvd装置
US5238499A (en) * 1990-07-16 1993-08-24 Novellus Systems, Inc. Gas-based substrate protection during processing
US5230741A (en) * 1990-07-16 1993-07-27 Novellus Systems, Inc. Gas-based backside protection during substrate processing
US5269847A (en) * 1990-08-23 1993-12-14 Applied Materials, Inc. Variable rate distribution gas flow reaction chamber
JP2666609B2 (ja) * 1991-06-26 1997-10-22 日本電気株式会社 プラズマ処理装置
JPH05315300A (ja) * 1992-05-13 1993-11-26 Toshiba Corp ドライエッチング装置
US5280894A (en) * 1992-09-30 1994-01-25 Honeywell Inc. Fixture for backside wafer etching
US5292554A (en) * 1992-11-12 1994-03-08 Applied Materials, Inc. Deposition apparatus using a perforated pumping plate
JP3259380B2 (ja) * 1992-12-04 2002-02-25 ソニー株式会社 半導体装置の製造方法
US5352294A (en) * 1993-01-28 1994-10-04 White John M Alignment of a shadow frame and large flat substrates on a support
US5540821A (en) * 1993-07-16 1996-07-30 Applied Materials, Inc. Method and apparatus for adjustment of spacing between wafer and PVD target during semiconductor processing
KR100274754B1 (ko) * 1993-08-18 2000-12-15 히가시 데쓰로 성막장치 및 성막방법
WO1996008838A1 (en) * 1994-09-15 1996-03-21 Materials Research Corporation Apparatus and method for clampling a substrate

Also Published As

Publication number Publication date
DE19502777A1 (de) 1995-08-24
KR950034547A (ko) 1995-12-28
US6152073A (en) 2000-11-28
US6013136A (en) 2000-01-11
KR100392919B1 (ko) 2003-11-13
TW295688B (de) 1997-01-11

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