DE4140330C1 - - Google Patents

Info

Publication number
DE4140330C1
DE4140330C1 DE4140330A DE4140330A DE4140330C1 DE 4140330 C1 DE4140330 C1 DE 4140330C1 DE 4140330 A DE4140330 A DE 4140330A DE 4140330 A DE4140330 A DE 4140330A DE 4140330 C1 DE4140330 C1 DE 4140330C1
Authority
DE
Germany
Prior art keywords
silicon dioxide
layer
dioxide layer
contact
metallization layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE4140330A
Other languages
German (de)
English (en)
Inventor
Helmut 8050 Freising De Endl
Helmut 8052 Moosburg De Rinck
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Deutschland GmbH
Original Assignee
Texas Instruments Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Deutschland GmbH filed Critical Texas Instruments Deutschland GmbH
Priority to DE4140330A priority Critical patent/DE4140330C1/de
Priority to EP19920120649 priority patent/EP0545411A3/en
Priority to JP4327026A priority patent/JPH05251574A/ja
Application granted granted Critical
Publication of DE4140330C1 publication Critical patent/DE4140330C1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
    • H10P95/00—

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
DE4140330A 1991-12-06 1991-12-06 Expired - Fee Related DE4140330C1 (OSRAM)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE4140330A DE4140330C1 (OSRAM) 1991-12-06 1991-12-06
EP19920120649 EP0545411A3 (en) 1991-12-06 1992-12-03 Method for improving the step coverage at contact windows
JP4327026A JPH05251574A (ja) 1991-12-06 1992-12-07 コンタクト窓における段差被覆性改善方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4140330A DE4140330C1 (OSRAM) 1991-12-06 1991-12-06

Publications (1)

Publication Number Publication Date
DE4140330C1 true DE4140330C1 (OSRAM) 1993-03-18

Family

ID=6446481

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4140330A Expired - Fee Related DE4140330C1 (OSRAM) 1991-12-06 1991-12-06

Country Status (3)

Country Link
EP (1) EP0545411A3 (OSRAM)
JP (1) JPH05251574A (OSRAM)
DE (1) DE4140330C1 (OSRAM)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5874782A (en) * 1995-08-24 1999-02-23 International Business Machines Corporation Wafer with elevated contact structures
CA3006799A1 (en) 2015-12-01 2017-06-08 The Arizona Board Of Regents On Behalf Of The University Of Arizona Htert modulators and methods of use

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3705152A1 (de) * 1986-02-20 1987-08-27 Mitsubishi Electric Corp Halbleitereinrichtung und verfahren zu deren herstellung
DE3915337A1 (de) * 1989-05-10 1990-11-15 Siemens Ag Verfahren zum herstellen einer niederohmigen planen kontaktmetallisierung fuer hochintegrierte halbleiterschaltungen

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2554638A1 (de) * 1975-12-04 1977-06-16 Siemens Ag Verfahren zur erzeugung definierter boeschungswinkel bei einer aetzkante
CA1339817C (en) * 1989-05-31 1998-04-14 Mitel Corporation Curing and passivation of spin-on-glasses by a plasma process, and product produced thereby

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3705152A1 (de) * 1986-02-20 1987-08-27 Mitsubishi Electric Corp Halbleitereinrichtung und verfahren zu deren herstellung
DE3915337A1 (de) * 1989-05-10 1990-11-15 Siemens Ag Verfahren zum herstellen einer niederohmigen planen kontaktmetallisierung fuer hochintegrierte halbleiterschaltungen

Also Published As

Publication number Publication date
EP0545411A3 (en) 1993-07-21
JPH05251574A (ja) 1993-09-28
EP0545411A2 (en) 1993-06-09

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Legal Events

Date Code Title Description
8100 Publication of patent without earlier publication of application
D1 Grant (no unexamined application published) patent law 81
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee