DE3853759T2 - Datenprozessor mit zwei Betriebsmoden. - Google Patents

Datenprozessor mit zwei Betriebsmoden.

Info

Publication number
DE3853759T2
DE3853759T2 DE3853759T DE3853759T DE3853759T2 DE 3853759 T2 DE3853759 T2 DE 3853759T2 DE 3853759 T DE3853759 T DE 3853759T DE 3853759 T DE3853759 T DE 3853759T DE 3853759 T2 DE3853759 T2 DE 3853759T2
Authority
DE
Germany
Prior art keywords
data processor
operating modes
modes
operating
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3853759T
Other languages
English (en)
Other versions
DE3853759D1 (de
Inventor
Susumu Kaneko
Keiichi Kurakazu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3853759D1 publication Critical patent/DE3853759D1/de
Publication of DE3853759T2 publication Critical patent/DE3853759T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/74—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information operating in dual or compartmented mode, i.e. at least one secure mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533—Hypervisors; Virtual machine monitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Storage Device Security (AREA)
  • Microcomputers (AREA)
DE3853759T 1987-10-09 1988-08-08 Datenprozessor mit zwei Betriebsmoden. Expired - Fee Related DE3853759T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62255180A JP3023425B2 (ja) 1987-10-09 1987-10-09 データ処理装置

Publications (2)

Publication Number Publication Date
DE3853759D1 DE3853759D1 (de) 1995-06-14
DE3853759T2 true DE3853759T2 (de) 1995-11-16

Family

ID=17275149

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3853759T Expired - Fee Related DE3853759T2 (de) 1987-10-09 1988-08-08 Datenprozessor mit zwei Betriebsmoden.

Country Status (6)

Country Link
US (1) US5305460A (de)
EP (1) EP0312194B1 (de)
JP (1) JP3023425B2 (de)
KR (1) KR970004513B1 (de)
DE (1) DE3853759T2 (de)
HK (1) HK27696A (de)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
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US5282201A (en) * 1987-12-22 1994-01-25 Kendall Square Research Corporation Dynamic packet routing network
US5055999A (en) 1987-12-22 1991-10-08 Kendall Square Research Corporation Multiprocessor digital data processing system
US5335325A (en) * 1987-12-22 1994-08-02 Kendall Square Research Corporation High-speed packet switching apparatus and method
CA2019300C (en) * 1989-06-22 2001-06-12 Kendall Square Research Corporation Multiprocessor system with shared memory
US5596751A (en) * 1990-06-05 1997-01-21 Siemens Aktiengesellschaft Method for processing a user program on a parallel computer system
DE4018012A1 (de) * 1990-06-05 1991-12-12 Siemens Ag Verfahren zur bearbeitung eines benutzerprogramms auf einem parallelrechnersystem
JPH04346127A (ja) 1991-05-23 1992-12-02 Sony Corp 電子装置
CA2078312A1 (en) 1991-09-20 1993-03-21 Mark A. Kaufman Digital data processor with improved paging
US5623665A (en) * 1992-01-13 1997-04-22 Sony Corporation Electronic apparatus for patching a read-only memory
JP3230262B2 (ja) * 1992-01-24 2001-11-19 ソニー株式会社 電子装置及びその固定情報修正方法
US5208389A (en) * 1992-04-01 1993-05-04 Ethyl Corporation Process for high purity tetrabromobisphenol-A
JPH06318261A (ja) * 1992-09-18 1994-11-15 Sony Corp 電子装置
JP3284614B2 (ja) * 1992-09-19 2002-05-20 ソニー株式会社 電子装置
JP3810805B2 (ja) * 1992-09-19 2006-08-16 ソニー株式会社 情報修正システム
US5748981A (en) * 1992-10-20 1998-05-05 National Semiconductor Corporation Microcontroller with in-circuit user programmable microcode
US5737566A (en) * 1993-12-20 1998-04-07 Motorola, Inc. Data processing system having a memory with both a high speed operating mode and a low power operating mode and method therefor
US5557743A (en) * 1994-04-05 1996-09-17 Motorola, Inc. Protection circuit for a microprocessor
JP3563768B2 (ja) * 1994-05-31 2004-09-08 株式会社ルネサステクノロジ Ｒｏｍプログラム変更装置
US5737760A (en) * 1995-10-06 1998-04-07 Motorola Inc. Microcontroller with security logic circuit which prevents reading of internal memory by external program
JP4312272B2 (ja) * 1995-10-06 2009-08-12 モトローラ・インコーポレイテッド 内部メモリへのアクセスを制限するマイクロコントローラ
GB0005535D0 (en) * 2000-03-09 2000-04-26 Smiths Industries Plc Processing systems
JP3710671B2 (ja) 2000-03-14 2005-10-26 シャープ株式会社 １チップマイクロコンピュータ及びそれを用いたｉｃカード、並びに１チップマイクロコンピュータのアクセス制御方法
JP4547771B2 (ja) * 2000-04-28 2010-09-22 ソニー株式会社 情報処理システム、情報処理方法、情報処理装置
JP2002215460A (ja) * 2001-01-15 2002-08-02 Hitachi Kokusai Electric Inc 情報端末
JP2002342166A (ja) * 2001-05-15 2002-11-29 Fujitsu Ltd 情報処理装置及びアクセスレベル制御方法
US6976160B1 (en) * 2002-02-22 2005-12-13 Xilinx, Inc. Method and system for controlling default values of flip-flops in PGA/ASIC-based designs
CN1322385C (zh) * 2002-08-13 2007-06-20 诺基亚有限公司 用于提供数据安全性的电路系统和方法
DE102004003323A1 (de) * 2004-01-22 2005-08-18 Infineon Technologies Ag Halbleiterspeichervorrichtung und Schaltungsanordnung
DE102004048945B4 (de) * 2004-10-07 2007-10-11 Nec Electronics (Europe) Gmbh Systemüberwachungseinheit
US8533777B2 (en) * 2004-12-29 2013-09-10 Intel Corporation Mechanism to determine trust of out-of-band management agents
EP1801700B1 (de) * 2005-12-23 2013-06-26 Texas Instruments Inc. System und Verfahren zur Verwendungsbegrenzung eines DMA Kanals
WO2013101059A1 (en) * 2011-12-29 2013-07-04 Intel Corporation Supervisor mode execution protection

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE28109E (en) * 1969-02-28 1974-08-13 Selective data handling apparatus
US3828327A (en) * 1973-04-30 1974-08-06 Ibm Simplified storage protection and address translation under system mode control in a data processing system
US4393459A (en) * 1980-07-17 1983-07-12 International Business Machines Corp. Status reporting with ancillary data
JPS57174755A (en) * 1981-04-21 1982-10-27 Toshiba Corp 1-chip microprocessor
JPS58109957A (ja) * 1981-12-23 1983-06-30 Nec Corp シングルチツプマイクロコンピユ−タシステム
US4519032A (en) * 1982-06-09 1985-05-21 At&T Bell Laboratories Memory management arrangement for microprocessor systems
JPS5914062A (ja) * 1982-07-15 1984-01-24 Hitachi Ltd 二重化共有メモリ制御方法
JPS6074059A (ja) * 1983-09-30 1985-04-26 Fujitsu Ltd 記憶装置アクセス制御方式
US4825358A (en) * 1985-04-10 1989-04-25 Microsoft Corporation Method and operating system for executing programs in a multi-mode microprocessor
JPS6265149A (ja) * 1985-09-14 1987-03-24 Casio Comput Co Ltd メモリ管理ユニツト書き換え方式
US4887204A (en) * 1987-02-13 1989-12-12 International Business Machines Corporation System and method for accessing remote files in a distributed networking environment

Also Published As

Publication number Publication date
EP0312194A3 (de) 1991-04-24
HK27696A (en) 1996-02-23
US5305460A (en) 1994-04-19
JP3023425B2 (ja) 2000-03-21
EP0312194A2 (de) 1989-04-19
EP0312194B1 (de) 1995-05-10
KR970004513B1 (ko) 1997-03-28
KR890007162A (ko) 1989-06-19
DE3853759D1 (de) 1995-06-14
JPH0196747A (ja) 1989-04-14

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee