DE3784468D1 - Testbares mehrmodus-zaehlernetz und methode zur durchfuehrung des tests. - Google Patents

Testbares mehrmodus-zaehlernetz und methode zur durchfuehrung des tests.

Info

Publication number
DE3784468D1
DE3784468D1 DE8787903801T DE3784468T DE3784468D1 DE 3784468 D1 DE3784468 D1 DE 3784468D1 DE 8787903801 T DE8787903801 T DE 8787903801T DE 3784468 T DE3784468 T DE 3784468T DE 3784468 D1 DE3784468 D1 DE 3784468D1
Authority
DE
Germany
Prior art keywords
test
carrying
mode counter
counter network
testable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8787903801T
Other languages
English (en)
Other versions
DE3784468T2 (de
Inventor
D Underwood
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Application granted granted Critical
Publication of DE3784468D1 publication Critical patent/DE3784468D1/de
Publication of DE3784468T2 publication Critical patent/DE3784468T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/08—Output circuits
    • H03K21/12—Output circuits with parallel read-out
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318522—Test of Sequential circuits
    • G01R31/318527—Test of counters

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
DE8787903801T 1986-06-18 1987-05-29 Testbares mehrmodus-zaehlernetz und methode zur durchfuehrung des tests. Expired - Lifetime DE3784468T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/875,895 US4745630A (en) 1986-06-18 1986-06-18 Multi-mode counter network
PCT/US1987/001240 WO1987007968A2 (en) 1986-06-18 1987-05-29 Multi-mode counter network

Publications (2)

Publication Number Publication Date
DE3784468D1 true DE3784468D1 (de) 1993-04-08
DE3784468T2 DE3784468T2 (de) 1993-09-23

Family

ID=25366561

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787903801T Expired - Lifetime DE3784468T2 (de) 1986-06-18 1987-05-29 Testbares mehrmodus-zaehlernetz und methode zur durchfuehrung des tests.

Country Status (14)

Country Link
US (1) US4745630A (de)
EP (1) EP0272288B1 (de)
JP (1) JPS63503481A (de)
KR (1) KR910008920B1 (de)
AU (1) AU593114B2 (de)
CA (1) CA1279107C (de)
DE (1) DE3784468T2 (de)
DK (1) DK79288D0 (de)
EG (1) EG18237A (de)
ES (1) ES2006764A6 (de)
GR (1) GR870808B (de)
IL (1) IL82617A0 (de)
NO (1) NO880632D0 (de)
WO (1) WO1987007968A2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4761801A (en) * 1986-06-18 1988-08-02 Hughes Aircraft Company Look ahead terminal counter
US4745630A (en) * 1986-06-18 1988-05-17 Hughes Aircraft Company Multi-mode counter network
US4839910A (en) * 1988-01-28 1989-06-13 North American Philips Corporation, Signetics Division Counter with glitchless terminal count indication
US4979193A (en) * 1989-04-26 1990-12-18 Advanced Micro Devices, Inc. Method and apparatus for testing a binary counter
US5301284A (en) * 1991-01-16 1994-04-05 Walker-Estes Corporation Mixed-resolution, N-dimensional object space method and apparatus
US5164968A (en) * 1991-10-15 1992-11-17 Loral Aerospace Corp. Nine bit Gray code generator
US5412795A (en) * 1992-02-25 1995-05-02 Micral, Inc. State machine having a variable timing mechanism for varying the duration of logical output states of the state machine based on variation in the clock frequency
US5729754A (en) * 1994-03-28 1998-03-17 Estes; Mark D. Associative network method and apparatus
US5481580A (en) * 1995-01-26 1996-01-02 At&T Corp. Method and apparatus for testing long counters
US6055289A (en) * 1996-01-30 2000-04-25 Micron Technology, Inc. Shared counter

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3761695A (en) * 1972-10-16 1973-09-25 Ibm Method of level sensitive testing a functional logic system
US4092522A (en) * 1977-01-03 1978-05-30 Honeywell Information Systems Inc. 5-Bit counter/shift register utilizing current mode logic
JPS59115621A (ja) * 1982-12-22 1984-07-04 Toshiba Corp 論理回路
JPS59161131A (ja) * 1983-03-04 1984-09-11 Nec Corp 分周方式
DE3312687A1 (de) * 1983-04-08 1984-10-18 Siemens AG, 1000 Berlin und 8000 München Einrichtung zur pruefung von elektrische schaltkreise enthaltenden prueflingen
JPS609221A (ja) * 1983-06-28 1985-01-18 Sharp Corp テスト機能付分周回路
US4580137A (en) * 1983-08-29 1986-04-01 International Business Machines Corporation LSSD-testable D-type edge-trigger-operable latch with overriding set/reset asynchronous control
DE3375843D1 (en) * 1983-12-28 1988-04-07 Ibm Electrical-diagnosis method for a defect cell in a chain of cells of a shift register
US4621201A (en) * 1984-03-30 1986-11-04 Trilogy Systems Corporation Integrated circuit redundancy and method for achieving high-yield production
JPS6154713A (ja) * 1984-08-27 1986-03-19 Matsushita Electric Ind Co Ltd ゲ−トアレイ装置
JPS61133727A (ja) * 1984-12-04 1986-06-21 Fujitsu Ltd カウンタ故障分離回路
US4649539A (en) * 1985-11-04 1987-03-10 Honeywell Information Systems Inc. Apparatus providing improved diagnosability
US4745630A (en) * 1986-06-18 1988-05-17 Hughes Aircraft Company Multi-mode counter network

Also Published As

Publication number Publication date
ES2006764A6 (es) 1989-05-16
EP0272288B1 (de) 1993-03-03
KR880701409A (ko) 1988-07-27
NO880632L (no) 1988-02-12
AU7486087A (en) 1988-01-12
KR910008920B1 (ko) 1991-10-24
DE3784468T2 (de) 1993-09-23
DK79288A (da) 1988-02-16
DK79288D0 (da) 1988-02-16
EP0272288A1 (de) 1988-06-29
CA1279107C (en) 1991-01-15
GR870808B (en) 1987-07-20
JPS63503481A (ja) 1988-12-15
IL82617A0 (en) 1987-11-30
NO880632D0 (no) 1988-02-12
US4745630A (en) 1988-05-17
WO1987007968A2 (en) 1987-12-30
AU593114B2 (en) 1990-02-01
EG18237A (en) 1992-10-30
WO1987007968A3 (en) 1988-01-28

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