DE3673605D1 - In einer integrierten halbleiterschaltung angewandtes halbleiterwiderstandselement. - Google Patents

In einer integrierten halbleiterschaltung angewandtes halbleiterwiderstandselement.

Info

Publication number
DE3673605D1
DE3673605D1 DE8686304057T DE3673605T DE3673605D1 DE 3673605 D1 DE3673605 D1 DE 3673605D1 DE 8686304057 T DE8686304057 T DE 8686304057T DE 3673605 T DE3673605 T DE 3673605T DE 3673605 D1 DE3673605 D1 DE 3673605D1
Authority
DE
Germany
Prior art keywords
resistance element
semiconductor
element applied
integrated
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686304057T
Other languages
English (en)
Inventor
Kay Tohyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3673605D1 publication Critical patent/DE3673605D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
DE8686304057T 1985-05-28 1986-05-28 In einer integrierten halbleiterschaltung angewandtes halbleiterwiderstandselement. Expired - Fee Related DE3673605D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60115855A JPS61272964A (ja) 1985-05-28 1985-05-28 半導体抵抗素子

Publications (1)

Publication Number Publication Date
DE3673605D1 true DE3673605D1 (de) 1990-09-27

Family

ID=14672805

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686304057T Expired - Fee Related DE3673605D1 (de) 1985-05-28 1986-05-28 In einer integrierten halbleiterschaltung angewandtes halbleiterwiderstandselement.

Country Status (5)

Country Link
US (1) US4810907A (de)
EP (1) EP0222467B1 (de)
JP (1) JPS61272964A (de)
KR (1) KR900000063B1 (de)
DE (1) DE3673605D1 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4760284A (en) * 1987-01-12 1988-07-26 Triquint Semiconductor, Inc. Pinchoff voltage generator
JPH0793410B2 (ja) * 1987-12-28 1995-10-09 三菱電機株式会社 半導体装置
US5010385A (en) * 1990-03-30 1991-04-23 The United States Of America As Represented By The Secretary Of The Navy Resistive element using depletion-mode MOSFET's
US5359301A (en) * 1993-03-26 1994-10-25 National Semiconductor Corporation Process-, temperature-, and voltage-compensation for ECL delay cells
JP3305827B2 (ja) * 1993-09-07 2002-07-24 株式会社東芝 半導体集積回路
JP3400853B2 (ja) * 1994-04-27 2003-04-28 三菱電機株式会社 半導体装置
SG83670A1 (en) * 1997-09-02 2001-10-16 Oki Techno Ct Singapore A bias stabilization circuit
US6111430A (en) * 1998-06-24 2000-08-29 International Business Machines Corporation Circuit for interfacing a first type of logic circuit with a second type of logic circuit
US7589007B2 (en) * 1999-06-02 2009-09-15 Arizona Board Of Regents For And On Behalf Of Arizona State University MESFETs integrated with MOSFETs on common substrate and methods of forming the same
US6864131B2 (en) * 1999-06-02 2005-03-08 Arizona State University Complementary Schottky junction transistors and methods of forming the same
JP2003086767A (ja) * 2001-09-14 2003-03-20 Matsushita Electric Ind Co Ltd 半導体装置
US6788136B2 (en) * 2001-10-25 2004-09-07 General Electric Company Methods and apparatus for amplification in high temperature environments
US6781417B1 (en) * 2002-10-29 2004-08-24 Advanced Micro Devices, Inc. Buffer driver circuit for producing a fast, stable, and accurate reference voltage
US7183593B2 (en) * 2003-12-05 2007-02-27 Taiwan Semiconductor Manufacturing Company, Ltd. Heterostructure resistor and method of forming the same
US7746146B2 (en) 2006-07-28 2010-06-29 Suvolta, Inc. Junction field effect transistor input buffer level shifting circuit
WO2011107161A1 (en) * 2010-03-05 2011-09-09 Epcos Ag Resistance component

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4400636A (en) * 1980-12-05 1983-08-23 Ibm Corporation Threshold voltage tolerant logic
US4423339A (en) * 1981-02-23 1983-12-27 Motorola, Inc. Majority logic gate
US4631426A (en) * 1984-06-27 1986-12-23 Honeywell Inc. Digital circuit using MESFETS

Also Published As

Publication number Publication date
US4810907A (en) 1989-03-07
JPS61272964A (ja) 1986-12-03
KR860009493A (ko) 1986-12-23
EP0222467A1 (de) 1987-05-20
KR900000063B1 (ko) 1990-01-19
EP0222467B1 (de) 1990-08-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee