DE3638644A1 - Substratpotentialerzeugungseinrichtung - Google Patents

Substratpotentialerzeugungseinrichtung

Info

Publication number
DE3638644A1
DE3638644A1 DE19863638644 DE3638644A DE3638644A1 DE 3638644 A1 DE3638644 A1 DE 3638644A1 DE 19863638644 DE19863638644 DE 19863638644 DE 3638644 A DE3638644 A DE 3638644A DE 3638644 A1 DE3638644 A1 DE 3638644A1
Authority
DE
Germany
Prior art keywords
electrode
substrate
zone
semiconductor
mosfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19863638644
Other languages
German (de)
English (en)
Inventor
Youichi Tobita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE3638644A1 publication Critical patent/DE3638644A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0218—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of field effect structures
    • H01L27/0222—Charge pumping, substrate bias generation structures
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205—Substrate bias-voltage generators
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE19863638644 1985-12-27 1986-11-12 Substratpotentialerzeugungseinrichtung Ceased DE3638644A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60296960A JPS62155547A (ja) 1985-12-27 1985-12-27 基板電位発生装置

Publications (1)

Publication Number Publication Date
DE3638644A1 true DE3638644A1 (de) 1987-07-02

Family

ID=17840418

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19863638644 Ceased DE3638644A1 (de) 1985-12-27 1986-11-12 Substratpotentialerzeugungseinrichtung

Country Status (3)

Country Link
JP (1) JPS62155547A (ko)
KR (1) KR900002691B1 (ko)
DE (1) DE3638644A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100398043B1 (ko) * 1996-12-28 2004-05-17 주식회사 하이닉스반도체 반도체 소자의 모스 캐패시터 제조방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023782A2 (en) * 1979-07-26 1981-02-11 Fujitsu Limited Semiconductor device comprising EAROM cells
EP0014310B1 (en) * 1979-01-05 1982-12-29 Mitsubishi Denki Kabushiki Kaisha Substrate bias generator
US4559548A (en) * 1981-04-07 1985-12-17 Tokyo Shibaura Denki Kabushiki Kaisha CMOS Charge pump free of parasitic injection

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839884B2 (ja) * 1975-10-07 1983-09-02 新日本製鐵株式会社 アルカリキンゾクカゴウブツオモチイル ヨウユウテツゴウキン ノ レンゾクテキセイレンホウホウ
JPS57166067A (en) * 1981-04-07 1982-10-13 Toshiba Corp Bias generating unit for substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0014310B1 (en) * 1979-01-05 1982-12-29 Mitsubishi Denki Kabushiki Kaisha Substrate bias generator
EP0023782A2 (en) * 1979-07-26 1981-02-11 Fujitsu Limited Semiconductor device comprising EAROM cells
US4559548A (en) * 1981-04-07 1985-12-17 Tokyo Shibaura Denki Kabushiki Kaisha CMOS Charge pump free of parasitic injection

Also Published As

Publication number Publication date
KR870006639A (ko) 1987-07-13
JPS62155547A (ja) 1987-07-10
KR900002691B1 (ko) 1990-04-23

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8131 Rejection