DE3481236D1 - Vorrichtung zum steuern des zugangs zu einem speicher. - Google Patents
Vorrichtung zum steuern des zugangs zu einem speicher.Info
- Publication number
- DE3481236D1 DE3481236D1 DE8484901514T DE3481236T DE3481236D1 DE 3481236 D1 DE3481236 D1 DE 3481236D1 DE 8484901514 T DE8484901514 T DE 8484901514T DE 3481236 T DE3481236 T DE 3481236T DE 3481236 D1 DE3481236 D1 DE 3481236D1
- Authority
- DE
- Germany
- Prior art keywords
- controlling access
- memory
- refresh
- data
- mode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001514 detection method Methods 0.000 abstract 2
- 230000004044 response Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
- G06F11/1056—Updating check bits on partial write, i.e. read/modify/write
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
- G06F11/106—Correcting systematically all correctable errors, i.e. scrubbing
Landscapes
- Dram (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/480,996 US4542454A (en) | 1983-03-30 | 1983-03-30 | Apparatus for controlling access to a memory |
PCT/US1984/000400 WO1984003968A1 (en) | 1983-03-30 | 1984-03-14 | Apparatus for controlling access to a memory |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3481236D1 true DE3481236D1 (de) | 1990-03-08 |
Family
ID=23910168
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8484901514T Expired - Lifetime DE3481236D1 (de) | 1983-03-30 | 1984-03-14 | Vorrichtung zum steuern des zugangs zu einem speicher. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4542454A (de) |
EP (1) | EP0138964B1 (de) |
JP (1) | JPS60500979A (de) |
DE (1) | DE3481236D1 (de) |
WO (1) | WO1984003968A1 (de) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2138230B (en) * | 1983-04-12 | 1986-12-03 | Sony Corp | Dynamic random access memory arrangements |
DE3332601A1 (de) * | 1983-09-09 | 1985-03-28 | Siemens AG, 1000 Berlin und 8000 München | Schaltungsanordnung zum registrieren von adressen von einen fehlerhaften speicherinhalt aufweisenden speicherzellen |
JPS6134793A (ja) * | 1984-07-27 | 1986-02-19 | Hitachi Ltd | ダイナミツクメモリ装置における診断及びエラ−訂正装置 |
US4692923A (en) * | 1984-09-28 | 1987-09-08 | Ncr Corporation | Fault tolerant memory |
JPS61214298A (ja) * | 1985-03-20 | 1986-09-24 | Toshiba Corp | 誤り訂正機能を備えた半導体記憶装置 |
CA1240066A (en) * | 1985-08-15 | 1988-08-02 | John R. Ramsay | Dynamic memory refresh and parity checking circuit |
JPH087995B2 (ja) * | 1985-08-16 | 1996-01-29 | 富士通株式会社 | ダイナミツク半導体記憶装置のリフレツシユ方法および装置 |
US4710934A (en) * | 1985-11-08 | 1987-12-01 | Texas Instruments Incorporated | Random access memory with error correction capability |
JPH0612613B2 (ja) * | 1986-03-18 | 1994-02-16 | 富士通株式会社 | 半導体記憶装置 |
US4797850A (en) * | 1986-05-12 | 1989-01-10 | Advanced Micro Devices, Inc. | Dynamic random access memory controller with multiple independent control channels |
US4791642A (en) * | 1986-10-17 | 1988-12-13 | Amdahl Corporation | Buffer error retry |
JPS63140490A (ja) * | 1986-12-03 | 1988-06-13 | Sharp Corp | ダイナミツクram |
US4918650A (en) * | 1986-12-22 | 1990-04-17 | ON! Systems | Memory control interface apparatus |
US4894770A (en) * | 1987-06-01 | 1990-01-16 | Massachusetts Institute Of Technology | Set associative memory |
US4884234A (en) * | 1987-06-29 | 1989-11-28 | Ncr Corporation | Dynamic RAM refresh circuit with DMA access |
US4955024A (en) * | 1987-09-14 | 1990-09-04 | Visual Information Technologies, Inc. | High speed image processing computer with error correction and logging |
JP2606862B2 (ja) * | 1987-12-28 | 1997-05-07 | 株式会社東芝 | 単−エラー検出・訂正方式 |
US5301278A (en) * | 1988-04-29 | 1994-04-05 | International Business Machines Corporation | Flexible dynamic memory controller |
US5278974A (en) * | 1989-12-04 | 1994-01-11 | Digital Equipment Corporation | Method and apparatus for the dynamic adjustment of data transfer timing to equalize the bandwidths of two buses in a computer system having different bandwidths |
US5530934A (en) * | 1991-02-02 | 1996-06-25 | Vlsi Technology, Inc. | Dynamic memory address line decoding |
US5448710A (en) * | 1991-02-26 | 1995-09-05 | Hewlett-Packard Company | Dynamically configurable interface cards with variable memory size |
JPH07122865B2 (ja) * | 1992-01-02 | 1995-12-25 | インターナショナル・ビジネス・マシーンズ・コーポレイション | バス動作の動作速度を制御するようにしたバス・インターフェースを有するコンピュータ・システム |
US5495491A (en) * | 1993-03-05 | 1996-02-27 | Motorola, Inc. | System using a memory controller controlling an error correction means to detect and correct memory errors when and over a time interval indicated by registers in the memory controller |
IT1264443B1 (it) * | 1993-05-14 | 1996-09-23 | Alcatel Italia | Controllore per ram dinamiche e circuito per il controllo di una pluralita' di banchi di memoria ram dinamica |
EP0643351A1 (de) * | 1993-08-11 | 1995-03-15 | Siemens Nixdorf Informationssysteme Aktiengesellschaft | Verfahren zur Erhöhung der Fehlerfreiheit von in Mikroprogrammspeichern einer Datenverarbeitungsanlage gespeicherten Mikrobefehlen und entsprechend arbeitende Mikroprogrammsteuerung |
JPH10177800A (ja) * | 1996-10-21 | 1998-06-30 | Texas Instr Inc <Ti> | エラー訂正ダイナミック・メモリ及びそのエラー訂正方法 |
US6067255A (en) * | 1997-07-03 | 2000-05-23 | Samsung Electronics Co., Ltd. | Merged memory and logic (MML) integrated circuits including independent memory bank signals and methods |
US5959929A (en) * | 1997-12-29 | 1999-09-28 | Micron Technology, Inc. | Method for writing to multiple banks of a memory device |
KR100363108B1 (ko) * | 1998-12-30 | 2003-02-20 | 주식회사 하이닉스반도체 | 반도체 메모리장치와 그 장치의 리프레쉬주기 조절방법 |
US6119248A (en) * | 1998-01-26 | 2000-09-12 | Dell Usa L.P. | Operating system notification of correctable error in computer information |
US6559851B1 (en) | 1998-05-21 | 2003-05-06 | Mitsubishi Electric & Electronics Usa, Inc. | Methods for semiconductor systems for graphics processing |
US6504550B1 (en) | 1998-05-21 | 2003-01-07 | Mitsubishi Electric & Electronics Usa, Inc. | System for graphics processing employing semiconductor device |
US6661421B1 (en) | 1998-05-21 | 2003-12-09 | Mitsubishi Electric & Electronics Usa, Inc. | Methods for operation of semiconductor memory |
US6535218B1 (en) | 1998-05-21 | 2003-03-18 | Mitsubishi Electric & Electronics Usa, Inc. | Frame buffer memory for graphic processing |
US6292869B1 (en) | 1998-08-31 | 2001-09-18 | International Business Machines Corporation | System and method for memory scrub during self timed refresh |
JP2002056671A (ja) * | 2000-08-14 | 2002-02-22 | Hitachi Ltd | ダイナミック型ramのデータ保持方法と半導体集積回路装置 |
WO2002032231A1 (en) * | 2000-10-19 | 2002-04-25 | Edens, Luppo | Protein hydrolysates |
US6799291B1 (en) | 2000-11-20 | 2004-09-28 | International Business Machines Corporation | Method and system for detecting a hard failure in a memory array |
US7278062B2 (en) * | 2003-01-09 | 2007-10-02 | Freescale Semiconductor, Inc. | Method and apparatus for responding to access errors in a data processing system |
EP1505608B1 (de) * | 2003-08-06 | 2006-10-18 | STMicroelectronics S.r.l. | Speichersystem mit Fehlererkennungsvorrichtung |
JP2005141845A (ja) * | 2003-11-07 | 2005-06-02 | Fujitsu Ltd | 半導体装置 |
US20080080284A1 (en) * | 2006-09-15 | 2008-04-03 | Peter Mayer | Method and apparatus for refreshing memory cells of a memory |
US20140300615A1 (en) * | 2011-11-24 | 2014-10-09 | Freescale Semiconductor, Inc. | Memory access controller, data processing system, and method for managing data flow between a memory unit and a processing unit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4183096A (en) * | 1978-05-25 | 1980-01-08 | Bell Telephone Laboratories, Incorporated | Self checking dynamic memory system |
JPS55163680A (en) * | 1979-06-07 | 1980-12-19 | Hitachi Ltd | Magnetic bubble driving circuit |
US4319356A (en) * | 1979-12-19 | 1982-03-09 | Ncr Corporation | Self-correcting memory system |
US4380812A (en) * | 1980-04-25 | 1983-04-19 | Data General Corporation | Refresh and error detection and correction technique for a data processing system |
JPS56165989A (en) * | 1980-05-23 | 1981-12-19 | Fujitsu Ltd | Memory patrol system |
US4412314A (en) * | 1980-06-02 | 1983-10-25 | Mostek Corporation | Semiconductor memory for use in conjunction with error detection and correction circuit |
US4369510A (en) * | 1980-07-25 | 1983-01-18 | Honeywell Information Systems Inc. | Soft error rewrite control system |
-
1983
- 1983-03-30 US US06/480,996 patent/US4542454A/en not_active Expired - Lifetime
-
1984
- 1984-03-14 DE DE8484901514T patent/DE3481236D1/de not_active Expired - Lifetime
- 1984-03-14 JP JP59501428A patent/JPS60500979A/ja active Granted
- 1984-03-14 EP EP84901514A patent/EP0138964B1/de not_active Expired
- 1984-03-14 WO PCT/US1984/000400 patent/WO1984003968A1/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
EP0138964B1 (de) | 1990-01-31 |
JPS60500979A (ja) | 1985-06-27 |
WO1984003968A1 (en) | 1984-10-11 |
EP0138964A1 (de) | 1985-05-02 |
EP0138964A4 (de) | 1987-07-23 |
US4542454A (en) | 1985-09-17 |
JPH0471223B2 (de) | 1992-11-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |