DE2851954A1 - Logisches schaltungsglied mit mos- transistoren - Google Patents
Logisches schaltungsglied mit mos- transistorenInfo
- Publication number
- DE2851954A1 DE2851954A1 DE19782851954 DE2851954A DE2851954A1 DE 2851954 A1 DE2851954 A1 DE 2851954A1 DE 19782851954 DE19782851954 DE 19782851954 DE 2851954 A DE2851954 A DE 2851954A DE 2851954 A1 DE2851954 A1 DE 2851954A1
- Authority
- DE
- Germany
- Prior art keywords
- transistor
- zone
- reversing
- circuit element
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000002513 implantation Methods 0.000 claims description 25
- 230000007704 transition Effects 0.000 claims description 13
- 238000005516 engineering process Methods 0.000 claims description 12
- 230000010354 integration Effects 0.000 claims description 11
- 230000002441 reversible effect Effects 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 4
- 238000009413 insulation Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000001419 dependent effect Effects 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000036961 partial effect Effects 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- FGRBYDKOBBBPOI-UHFFFAOYSA-N 10,10-dioxo-2-[4-(N-phenylanilino)phenyl]thioxanthen-9-one Chemical compound O=C1c2ccccc2S(=O)(=O)c2ccc(cc12)-c1ccc(cc1)N(c1ccccc1)c1ccccc1 FGRBYDKOBBBPOI-UHFFFAOYSA-N 0.000 description 1
- 241000570065 Domene Species 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 208000037516 chromosome inversion disease Diseases 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002829 reductive effect Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09403—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
- H03K19/09414—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors with gate injection or static induction [STIL]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/09441—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
- H03K19/09443—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type using a combination of enhancement and depletion transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/126—Top-view geometrical layouts of the regions or the junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
- H10D64/311—Gate electrodes for field-effect devices
- H10D64/411—Gate electrodes for field-effect devices for FETs
- H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
- H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
- H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/84—Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/211—Design considerations for internal polarisation
- H10D89/213—Design considerations for internal polarisation in field-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Logic Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7736720A FR2411512A1 (fr) | 1977-12-06 | 1977-12-06 | Porte logique a transistor mos multidrain |
Publications (1)
Publication Number | Publication Date |
---|---|
DE2851954A1 true DE2851954A1 (de) | 1979-06-07 |
Family
ID=9198517
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19782851954 Withdrawn DE2851954A1 (de) | 1977-12-06 | 1978-12-01 | Logisches schaltungsglied mit mos- transistoren |
Country Status (8)
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2477778A1 (fr) * | 1980-03-04 | 1981-09-11 | Thomson Csf | Structure de transistor a effet de champ a grille isolee et application a une realisation de portes logiques |
FR2493076B1 (fr) * | 1980-10-24 | 1985-11-15 | Majos Jacques | Perfectionnements aux portes logiques a structure integree mos |
US4462041A (en) * | 1981-03-20 | 1984-07-24 | Harris Corporation | High speed and current gain insulated gate field effect transistors |
FR2517491A1 (fr) * | 1981-11-27 | 1983-06-03 | Labo Electronique Physique | Combineur-melangeur a transistor double source |
NL8303834A (nl) * | 1983-11-08 | 1985-06-03 | Philips Nv | Halfgeleiderinrichting. |
NL8401117A (nl) * | 1984-04-09 | 1985-11-01 | Philips Nv | Halfgeleiderinrichting met veldeffekttransistors met geisoleerde poortelektrode. |
US4641047A (en) * | 1984-07-02 | 1987-02-03 | Motorola, Inc. | Complex direct coupled transistor logic |
US4680484A (en) * | 1984-10-19 | 1987-07-14 | Trw Inc. | Wired-AND FET logic gate |
TW287307B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * | 1992-04-14 | 1996-10-01 | Philips Electronics Nv | |
JP3346193B2 (ja) * | 1996-11-18 | 2002-11-18 | 松下電器産業株式会社 | 電力増幅器 |
JP3379376B2 (ja) * | 1997-03-14 | 2003-02-24 | 松下電器産業株式会社 | 電界効果トランジスタおよびそれを用いた電力増幅器 |
KR100945467B1 (ko) * | 2001-10-09 | 2010-03-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 스위칭소자, 표시장치, 그 스위칭소자를 사용한 발광장치및 반도체장치 |
JP4202012B2 (ja) | 2001-11-09 | 2008-12-24 | 株式会社半導体エネルギー研究所 | 発光装置及び電流記憶回路 |
JP4046267B2 (ja) * | 2002-03-26 | 2008-02-13 | 株式会社半導体エネルギー研究所 | 表示装置 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4015278A (en) * | 1974-11-26 | 1977-03-29 | Fujitsu Ltd. | Field effect semiconductor device |
JPS5268382A (en) * | 1975-12-05 | 1977-06-07 | Hitachi Ltd | Semiconductor circuit unit |
JPS5811102B2 (ja) * | 1975-12-09 | 1983-03-01 | ザイダンホウジン ハンドウタイケンキユウシンコウカイ | 半導体集積回路 |
-
1977
- 1977-12-06 FR FR7736720A patent/FR2411512A1/fr active Granted
-
1978
- 1978-11-20 GB GB7845314A patent/GB2015251B/en not_active Expired
- 1978-12-01 DE DE19782851954 patent/DE2851954A1/de not_active Withdrawn
- 1978-12-04 US US05/966,502 patent/US4219828A/en not_active Expired - Lifetime
- 1978-12-05 ES ES475716A patent/ES475716A1/es not_active Expired
- 1978-12-05 NL NL7811887A patent/NL7811887A/xx not_active Application Discontinuation
- 1978-12-05 CA CA317,435A patent/CA1111514A/en not_active Expired
- 1978-12-06 JP JP15013578A patent/JPS5487076A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
FR2411512B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1982-10-15 |
US4219828A (en) | 1980-08-26 |
GB2015251A (en) | 1979-09-05 |
ES475716A1 (es) | 1979-04-16 |
NL7811887A (nl) | 1979-06-08 |
CA1111514A (en) | 1981-10-27 |
JPS5487076A (en) | 1979-07-11 |
GB2015251B (en) | 1982-03-03 |
FR2411512A1 (fr) | 1979-07-06 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8141 | Disposal/no request for examination |