DE2847213A1 - Phasengeregelte oszillatorschaltung - Google Patents

Phasengeregelte oszillatorschaltung

Info

Publication number
DE2847213A1
DE2847213A1 DE19782847213 DE2847213A DE2847213A1 DE 2847213 A1 DE2847213 A1 DE 2847213A1 DE 19782847213 DE19782847213 DE 19782847213 DE 2847213 A DE2847213 A DE 2847213A DE 2847213 A1 DE2847213 A1 DE 2847213A1
Authority
DE
Germany
Prior art keywords
low
operational amplifier
pass filter
phase
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19782847213
Other languages
German (de)
English (en)
Inventor
Christian Poinas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Original Assignee
Alcatel CIT SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA filed Critical Alcatel CIT SA
Publication of DE2847213A1 publication Critical patent/DE2847213A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H11/12—Frequency selective two-port networks using amplifiers with feedback
    • H03H11/1217—Frequency selective two-port networks using amplifiers with feedback using a plurality of operational amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
DE19782847213 1977-11-04 1978-10-30 Phasengeregelte oszillatorschaltung Withdrawn DE2847213A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7733248A FR2408243A1 (fr) 1977-11-04 1977-11-04 Boucle a verrouillage de phase

Publications (1)

Publication Number Publication Date
DE2847213A1 true DE2847213A1 (de) 1979-05-10

Family

ID=9197280

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19782847213 Withdrawn DE2847213A1 (de) 1977-11-04 1978-10-30 Phasengeregelte oszillatorschaltung

Country Status (10)

Country Link
US (1) US4205277A (fr)
BE (1) BE871339A (fr)
CA (1) CA1106457A (fr)
DE (1) DE2847213A1 (fr)
FR (1) FR2408243A1 (fr)
GB (1) GB2007445B (fr)
IE (1) IE47413B1 (fr)
IT (1) IT1107946B (fr)
LU (1) LU80464A1 (fr)
NL (1) NL7810888A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3029249A1 (de) * 1980-08-01 1982-02-18 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur synchronisation eines gestoerten empfangssignals mit dem zugehoerigen sendesignal
DE102010029977B4 (de) 2009-06-12 2019-05-09 Intel Deutschland Gmbh Kompensation von von Leistungsversorgungsrampen verursachten Phasenabweichungen oder Phasenstörungen einer Phasenregelschleife

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4310805A (en) * 1979-12-13 1982-01-12 General Electric Company Phase-locked loop stabilized by a crystal oscillator
US4365211A (en) * 1980-10-31 1982-12-21 Westinghouse Electric Corp. Phase-locked loop with initialization loop
JPS57171845A (en) * 1981-04-15 1982-10-22 Sony Corp Phase locked loop circuit
FR2522160B1 (fr) * 1982-02-19 1985-08-30 Thomson Csf Systeme d'emission pour station de radionavigation du type vor conventionnel
US4484152A (en) * 1982-05-19 1984-11-20 Westinghouse Electric Corp. Phase-locked loop having improved locking capabilities
JPS6156555A (ja) * 1984-08-27 1986-03-22 Nec Corp 復調装置
US4835481A (en) * 1986-09-30 1989-05-30 Siemens Aktiengesellschaft Circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a reference frequency
CA2017501C (fr) * 1989-05-26 1995-08-29 Shigeo Terashima Dispositif d'enregistrement et de reproduction
FR2651393B1 (fr) * 1989-08-29 1994-04-08 Alcatel Espace Disposition de recuperation de porteuse a boucle de costas.
FR2656179B1 (fr) * 1989-12-15 1994-04-01 Alcatel Espace Demodulateur a boucle de phase.
US4993048A (en) * 1990-04-18 1991-02-12 Unisys Corporation Self-clocking system
US5142255A (en) * 1990-05-07 1992-08-25 The Texas A&M University System Planar active endfire radiating elements and coplanar waveguide filters with wide electronic tuning bandwidth
DE19611219A1 (de) * 1996-03-21 1997-09-25 Fraunhofer Ges Forschung Phasenregelschleife mit umschaltbarer Schleifenbandbreite
US6998923B2 (en) * 2003-09-18 2006-02-14 Cirrus Logic, Inc. Low-noise loop filter for a phase-locked loop system
US8446191B2 (en) * 2009-12-07 2013-05-21 Qualcomm Incorporated Phase locked loop with digital compensation for analog integration

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3909735A (en) * 1974-04-04 1975-09-30 Ncr Co Slow switch for bandwidth change in phase-locked loop
US3983501A (en) * 1975-09-29 1976-09-28 The United States Of America As Represented By The Secretary Of The Navy Hybrid tracking loop for detecting phase shift keyed signals
US4034310A (en) * 1977-01-05 1977-07-05 Coe Thomas F Phase-locked loop oscillator

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
GB-Z.:Proc.IEEE,Vol.123,Nr.8,Aug.1976,S.761-764 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3029249A1 (de) * 1980-08-01 1982-02-18 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur synchronisation eines gestoerten empfangssignals mit dem zugehoerigen sendesignal
DE102010029977B4 (de) 2009-06-12 2019-05-09 Intel Deutschland Gmbh Kompensation von von Leistungsversorgungsrampen verursachten Phasenabweichungen oder Phasenstörungen einer Phasenregelschleife

Also Published As

Publication number Publication date
IT7869526A0 (it) 1978-11-03
BE871339A (fr) 1979-04-18
LU80464A1 (fr) 1979-06-15
FR2408243A1 (fr) 1979-06-01
GB2007445B (en) 1982-05-12
IT1107946B (it) 1985-12-02
FR2408243B1 (fr) 1980-04-25
CA1106457A (fr) 1981-08-04
IE47413B1 (en) 1984-03-07
IE782177L (en) 1979-05-04
NL7810888A (nl) 1979-05-08
US4205277A (en) 1980-05-27
GB2007445A (en) 1979-05-16

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8130 Withdrawal