DE2458680C3 - Verfahren zur Herstellung von dielektrisch isolierten Substraten geringer Durchbiegung für monolithisch integrierte Halbleiterschaltungen - Google Patents

Verfahren zur Herstellung von dielektrisch isolierten Substraten geringer Durchbiegung für monolithisch integrierte Halbleiterschaltungen

Info

Publication number
DE2458680C3
DE2458680C3 DE2458680A DE2458680A DE2458680C3 DE 2458680 C3 DE2458680 C3 DE 2458680C3 DE 2458680 A DE2458680 A DE 2458680A DE 2458680 A DE2458680 A DE 2458680A DE 2458680 C3 DE2458680 C3 DE 2458680C3
Authority
DE
Germany
Prior art keywords
silicon
silicon oxide
single crystal
polycrystalline silicon
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2458680A
Other languages
German (de)
English (en)
Other versions
DE2458680A1 (de
DE2458680B2 (de
Inventor
Takaya Hitachi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2458680A1 publication Critical patent/DE2458680A1/de
Publication of DE2458680B2 publication Critical patent/DE2458680B2/de
Application granted granted Critical
Publication of DE2458680C3 publication Critical patent/DE2458680C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/019—Manufacture or treatment of isolation regions comprising dielectric materials using epitaxial passivated integrated circuit [EPIC] processes
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0227—Pretreatment of the material to be coated by cleaning or etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
    • H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
    • H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6322—Formation by thermal treatments
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials

Landscapes

  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Element Separation (AREA)
DE2458680A 1973-12-14 1974-12-11 Verfahren zur Herstellung von dielektrisch isolierten Substraten geringer Durchbiegung für monolithisch integrierte Halbleiterschaltungen Expired DE2458680C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13862573A JPS5635024B2 (https=) 1973-12-14 1973-12-14

Publications (3)

Publication Number Publication Date
DE2458680A1 DE2458680A1 (de) 1975-06-26
DE2458680B2 DE2458680B2 (de) 1979-02-01
DE2458680C3 true DE2458680C3 (de) 1984-07-26

Family

ID=15226426

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2458680A Expired DE2458680C3 (de) 1973-12-14 1974-12-11 Verfahren zur Herstellung von dielektrisch isolierten Substraten geringer Durchbiegung für monolithisch integrierte Halbleiterschaltungen

Country Status (3)

Country Link
JP (1) JPS5635024B2 (https=)
CA (1) CA1015464A (https=)
DE (1) DE2458680C3 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5718341B2 (https=) * 1974-12-11 1982-04-16
JPS5353320A (en) * 1976-10-25 1978-05-15 Kobe Kikou Kk Device for supplying slide for slide projector
JPS62124753A (ja) * 1985-11-25 1987-06-06 Matsushita Electric Works Ltd 絶縁層分離基板の製法
JPS62124754A (ja) * 1985-11-25 1987-06-06 Matsushita Electric Works Ltd 絶縁層分離基板の製法
JPS63182836A (ja) * 1987-01-24 1988-07-28 Matsushita Electric Works Ltd 絶縁層分離基板の製法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT246789B (de) * 1962-06-04 1966-05-10 Philips Nv Verfahren zur Herstellung einer Halbleitervorrichtung und nach diesem Verfahren hergestellte Halbleitervorrichtung
DE1290925B (de) * 1963-06-10 1969-03-20 Philips Nv Verfahren zum Abscheiden von Silicium auf einem Halbleiterkoerper
DE1243274C2 (de) * 1964-05-08 1973-01-11 Licentia Gmbh Verfahren zur Herstellung von Halbleiteranordnungen mit einem Halbleiterkoerper aus Silizium
DE1261480B (de) * 1964-09-17 1968-02-22 Telefunken Patent Verfahren zur Erzeugung einer elektrisch isolierenden Schicht auf einem Halbleiterkoerper
US3461003A (en) * 1964-12-14 1969-08-12 Motorola Inc Method of fabricating a semiconductor structure with an electrically isolated region of semiconductor material
CH428947A (fr) * 1966-01-31 1967-01-31 Centre Electron Horloger Procédé de fabrication d'un circuit intégré
US3624463A (en) * 1969-10-17 1971-11-30 Motorola Inc Method of and apparatus for indicating semiconductor island thickness and for increasing isolation and decreasing capacity between islands
DE2047998A1 (de) * 1970-09-30 1972-04-06 Licentia Gmbh Verfahren zum Herstellen einer Planaranordnung

Also Published As

Publication number Publication date
JPS5635024B2 (https=) 1981-08-14
JPS5092689A (https=) 1975-07-24
DE2458680A1 (de) 1975-06-26
DE2458680B2 (de) 1979-02-01
CA1015464A (en) 1977-08-09

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