DE2413804C2 - Schaltungsanordnung für eine wortorganisierte Halbleiterspeichermatrix - Google Patents

Schaltungsanordnung für eine wortorganisierte Halbleiterspeichermatrix

Info

Publication number
DE2413804C2
DE2413804C2 DE2413804A DE2413804A DE2413804C2 DE 2413804 C2 DE2413804 C2 DE 2413804C2 DE 2413804 A DE2413804 A DE 2413804A DE 2413804 A DE2413804 A DE 2413804A DE 2413804 C2 DE2413804 C2 DE 2413804C2
Authority
DE
Germany
Prior art keywords
transistors
word
bit
bit line
lines
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2413804A
Other languages
German (de)
English (en)
Other versions
DE2413804A1 (de
Inventor
Richard Arthur Underhill Vt. Kenyon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2413804A1 publication Critical patent/DE2413804A1/de
Application granted granted Critical
Publication of DE2413804C2 publication Critical patent/DE2413804C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0491—Virtual ground arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE2413804A 1973-05-04 1974-03-22 Schaltungsanordnung für eine wortorganisierte Halbleiterspeichermatrix Expired DE2413804C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00357439A US3851317A (en) 1973-05-04 1973-05-04 Double density non-volatile memory array

Publications (2)

Publication Number Publication Date
DE2413804A1 DE2413804A1 (de) 1974-11-21
DE2413804C2 true DE2413804C2 (de) 1983-06-16

Family

ID=23405598

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2413804A Expired DE2413804C2 (de) 1973-05-04 1974-03-22 Schaltungsanordnung für eine wortorganisierte Halbleiterspeichermatrix

Country Status (5)

Country Link
US (1) US3851317A (en, 2012)
JP (1) JPS5713075B2 (en, 2012)
DE (1) DE2413804C2 (en, 2012)
FR (1) FR2228272B1 (en, 2012)
GB (1) GB1456114A (en, 2012)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4103344A (en) * 1976-01-30 1978-07-25 Westinghouse Electric Corp. Method and apparatus for addressing a non-volatile memory array
US4090257A (en) * 1976-06-28 1978-05-16 Westinghouse Electric Corp. Dual mode MNOS memory with paired columns and differential sense circuit
US4151603A (en) * 1977-10-31 1979-04-24 International Business Machines Corporation Precharged FET ROS array
EP0003413A3 (en) * 1978-01-19 1979-08-22 Sperry Corporation Improvements relating to semiconductor memories
US4198694A (en) * 1978-03-27 1980-04-15 Hewlett-Packard Company X-Y Addressable memory
US4287571A (en) * 1979-09-11 1981-09-01 International Business Machines Corporation High density transistor arrays
US4281397A (en) * 1979-10-29 1981-07-28 Texas Instruments Incorporated Virtual ground MOS EPROM or ROM matrix
US4301518A (en) * 1979-11-01 1981-11-17 Texas Instruments Incorporated Differential sensing of single ended memory array
US4344154A (en) * 1980-02-04 1982-08-10 Texas Instruments Incorporated Programming sequence for electrically programmable memory
JPS6095794A (ja) * 1983-10-28 1985-05-29 Hitachi Ltd 半導体集積回路
JPS62133672U (en, 2012) * 1986-02-15 1987-08-22
JPS62155875U (en, 2012) * 1986-03-25 1987-10-03
NL8802141A (nl) * 1988-08-31 1990-03-16 Philips Nv Geintegreerde halfgeleidergeheugenschakeling met dubbel gebruik van bitlijnen.
JP3304635B2 (ja) 1994-09-26 2002-07-22 三菱電機株式会社 半導体記憶装置
JP3558510B2 (ja) * 1997-10-30 2004-08-25 シャープ株式会社 不揮発性半導体記憶装置
JP6867387B2 (ja) * 2015-11-25 2021-04-28 サンライズ メモリー コーポレイション ３次元垂直ｎｏｒフラッシュ薄膜トランジスタストリング
US10896916B2 (en) 2017-11-17 2021-01-19 Sunrise Memory Corporation Reverse memory cell

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3623023A (en) * 1967-12-01 1971-11-23 Sperry Rand Corp Variable threshold transistor memory using pulse coincident writing
US3579204A (en) * 1969-03-24 1971-05-18 Sperry Rand Corp Variable conduction threshold transistor memory circuit insensitive to threshold deviations
US3618051A (en) * 1969-05-09 1971-11-02 Sperry Rand Corp Nonvolatile read-write memory with addressing
US3651490A (en) * 1969-06-12 1972-03-21 Nippon Electric Co Three dimensional memory utilizing semiconductor memory devices
US3720925A (en) * 1970-10-19 1973-03-13 Rca Corp Memory system using variable threshold transistors
US3699539A (en) * 1970-12-16 1972-10-17 North American Rockwell Bootstrapped inverter memory cell
US3702990A (en) * 1971-02-02 1972-11-14 Rca Corp Variable threshold memory system using minimum amplitude signals
US3728696A (en) * 1971-12-23 1973-04-17 North American Rockwell High density read-only memory

Also Published As

Publication number Publication date
FR2228272A1 (en, 2012) 1974-11-29
DE2413804A1 (de) 1974-11-21
JPS5011341A (en, 2012) 1975-02-05
GB1456114A (en) 1976-11-17
US3851317A (en) 1974-11-26
JPS5713075B2 (en, 2012) 1982-03-15
FR2228272B1 (en, 2012) 1977-10-14

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee