DE2327733A1 - Monolithischer speicher mit direktem zugriff - Google Patents

Monolithischer speicher mit direktem zugriff

Info

Publication number
DE2327733A1
DE2327733A1 DE19732327733 DE2327733A DE2327733A1 DE 2327733 A1 DE2327733 A1 DE 2327733A1 DE 19732327733 DE19732327733 DE 19732327733 DE 2327733 A DE2327733 A DE 2327733A DE 2327733 A1 DE2327733 A1 DE 2327733A1
Authority
DE
Germany
Prior art keywords
column
data
memory
row
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19732327733
Other languages
German (de)
English (en)
Inventor
Charles Robert Hoffman
William Walter Lattin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE2327733A1 publication Critical patent/DE2327733A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Databases & Information Systems (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE19732327733 1972-06-02 1973-05-30 Monolithischer speicher mit direktem zugriff Pending DE2327733A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25921672A 1972-06-02 1972-06-02

Publications (1)

Publication Number Publication Date
DE2327733A1 true DE2327733A1 (de) 1973-12-13

Family

ID=22984027

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19732327733 Pending DE2327733A1 (de) 1972-06-02 1973-05-30 Monolithischer speicher mit direktem zugriff

Country Status (5)

Country Link
US (1) US3760380A (US07696358-20100413-C00002.png)
JP (1) JPS4957737A (US07696358-20100413-C00002.png)
DE (1) DE2327733A1 (US07696358-20100413-C00002.png)
FR (1) FR2186702B1 (US07696358-20100413-C00002.png)
GB (1) GB1361780A (US07696358-20100413-C00002.png)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2658655A1 (de) * 1975-12-29 1977-07-14 Mostek Corp Mosfet-speicher-chip mit wahlfreiem zugriff
US4734597A (en) * 1985-12-07 1988-03-29 Intermetall, Division Of Ditti CMOS inverter chain

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5738996B2 (US07696358-20100413-C00002.png) * 1973-03-20 1982-08-18
JPS5620734B2 (US07696358-20100413-C00002.png) * 1973-07-31 1981-05-15
US3863230A (en) * 1973-07-18 1975-01-28 Intel Corp MOS memory decoder circuit
US3900742A (en) * 1974-06-24 1975-08-19 Us Navy Threshold logic using complementary mos device
FR2285676A1 (fr) * 1974-09-19 1976-04-16 Texas Instruments France Memoire morte a composants metal-oxyde-semi-conducteur complementaires
US4168537A (en) * 1975-05-02 1979-09-18 Tokyo Shibaura Electric Co., Ltd. Nonvolatile memory system enabling nonvolatile data transfer during power on
US4030084A (en) * 1975-11-28 1977-06-14 Honeywell Information Systems, Inc. Substrate bias voltage generated from refresh oscillator
US5359562A (en) * 1976-07-26 1994-10-25 Hitachi, Ltd. Semiconductor memory having polycrystalline silicon load resistors and CMOS peripheral circuitry
US4495427A (en) * 1980-12-05 1985-01-22 Rca Corporation Programmable logic gates and networks
GB2089160B (en) * 1980-12-05 1985-04-17 Rca Corp Programmable logic gates and networks
US5119332A (en) * 1981-05-13 1992-06-02 Hitachi, Ltd. Semiconductor memory
JPS57186289A (en) * 1981-05-13 1982-11-16 Hitachi Ltd Semiconductor memory
JPS60151893A (ja) * 1984-01-18 1985-08-09 Nec Corp 半導体メモリ回路
EP1492126A1 (en) * 2003-06-27 2004-12-29 Dialog Semiconductor GmbH Analog or multilevel DRAM cell having natural transistor
JP2007096907A (ja) * 2005-09-29 2007-04-12 Matsushita Electric Ind Co Ltd 半導体集積回路
TWI363267B (en) * 2008-07-18 2012-05-01 Novatek Microelectronics Corp Serial bus interface circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3521242A (en) * 1967-05-02 1970-07-21 Rca Corp Complementary transistor write and ndro for memory cell
US3588848A (en) * 1969-08-04 1971-06-28 Us Army Input-output control circuit for memory circuit
US3644905A (en) * 1969-11-12 1972-02-22 Gen Instrument Corp Single device storage cell for read-write memory utilizing complementary field-effect transistors
US3601629A (en) * 1970-02-06 1971-08-24 Westinghouse Electric Corp Bidirectional data line driver circuit for a mosfet memory

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2658655A1 (de) * 1975-12-29 1977-07-14 Mostek Corp Mosfet-speicher-chip mit wahlfreiem zugriff
US4734597A (en) * 1985-12-07 1988-03-29 Intermetall, Division Of Ditti CMOS inverter chain

Also Published As

Publication number Publication date
GB1361780A (en) 1974-07-30
US3760380A (en) 1973-09-18
FR2186702A1 (US07696358-20100413-C00002.png) 1974-01-11
JPS4957737A (US07696358-20100413-C00002.png) 1974-06-05
FR2186702B1 (US07696358-20100413-C00002.png) 1976-06-11

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