DE2310284C3 - Verfahren zum elektrischem Aufbringen von Glasteilchen auf einen Körper aus Halbleitermaterial - Google Patents

Verfahren zum elektrischem Aufbringen von Glasteilchen auf einen Körper aus Halbleitermaterial

Info

Publication number
DE2310284C3
DE2310284C3 DE2310284A DE2310284A DE2310284C3 DE 2310284 C3 DE2310284 C3 DE 2310284C3 DE 2310284 A DE2310284 A DE 2310284A DE 2310284 A DE2310284 A DE 2310284A DE 2310284 C3 DE2310284 C3 DE 2310284C3
Authority
DE
Germany
Prior art keywords
glass particles
semiconductor material
glass
suspension
polarity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2310284A
Other languages
German (de)
English (en)
Other versions
DE2310284B2 (de
DE2310284A1 (de
Inventor
Takeshi Itami Hyogo Yamamoto (Japan)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE2310284A1 publication Critical patent/DE2310284A1/de
Publication of DE2310284B2 publication Critical patent/DE2310284B2/de
Application granted granted Critical
Publication of DE2310284C3 publication Critical patent/DE2310284C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D13/00Electrophoretic coating characterised by the process
    • C25D13/02Electrophoretic coating characterised by the process with inorganic material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Inorganic Chemistry (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Surface Treatment Of Glass (AREA)
DE2310284A 1972-03-02 1973-03-01 Verfahren zum elektrischem Aufbringen von Glasteilchen auf einen Körper aus Halbleitermaterial Expired DE2310284C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2173472A JPS5339442B2 (enExample) 1972-03-02 1972-03-02

Publications (3)

Publication Number Publication Date
DE2310284A1 DE2310284A1 (de) 1973-09-20
DE2310284B2 DE2310284B2 (de) 1978-05-24
DE2310284C3 true DE2310284C3 (de) 1979-01-18

Family

ID=12063290

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2310284A Expired DE2310284C3 (de) 1972-03-02 1973-03-01 Verfahren zum elektrischem Aufbringen von Glasteilchen auf einen Körper aus Halbleitermaterial

Country Status (6)

Country Link
US (1) US3925179A (enExample)
JP (1) JPS5339442B2 (enExample)
DE (1) DE2310284C3 (enExample)
FR (1) FR2174252B1 (enExample)
GB (1) GB1404076A (enExample)
NL (1) NL159147B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS551703B2 (enExample) * 1972-07-07 1980-01-16
US3895127A (en) * 1974-04-19 1975-07-15 Rca Corp Method of selectively depositing glass on semiconductor devices
IT1099126B (it) * 1978-09-21 1985-09-18 Ates Componenti Elettron Bagno per la deposizione mediante elettroforesi di un rivestimento isolante su un corpo semiconduttore
US4595473A (en) * 1984-08-28 1986-06-17 Trw Inc. Forging lubricant
DE19520458A1 (de) * 1995-06-03 1996-12-05 Forschungszentrum Juelich Gmbh Vorrichtung zur elektrophoretischen Beschichtung von Substraten

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE666930C (de) * 1936-09-26 1938-11-01 Philips Patentverwaltung Verfahren zum Herstellen einer Deckschicht

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2321439A (en) * 1936-09-26 1943-06-08 Hartford Nat Bank & Trust Co Method of making vitreous coated bodies
US3163592A (en) * 1960-09-01 1964-12-29 Sylvania Electric Prod Process for electrophoretically applying a coating of phosphor
US3280019A (en) * 1963-07-03 1966-10-18 Ibm Method of selectively coating semiconductor chips
US3379625A (en) * 1964-03-30 1968-04-23 Gen Electric Semiconductor testing
US3642597A (en) * 1970-03-20 1972-02-15 Gen Electric Semiconductor passivating process

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE666930C (de) * 1936-09-26 1938-11-01 Philips Patentverwaltung Verfahren zum Herstellen einer Deckschicht

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Z: Deutsche Farbenzeitschrift, 11, 1966, S. 509-517 *

Also Published As

Publication number Publication date
JPS4889918A (enExample) 1973-11-24
NL7302981A (enExample) 1973-09-04
US3925179A (en) 1975-12-09
FR2174252A1 (enExample) 1973-10-12
FR2174252B1 (enExample) 1976-05-21
DE2310284B2 (de) 1978-05-24
GB1404076A (en) 1975-08-28
NL159147B (nl) 1979-01-15
DE2310284A1 (de) 1973-09-20
USB336345I5 (enExample) 1975-01-28
JPS5339442B2 (enExample) 1978-10-21

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)