DE2307814A1 - Verfahren zur herstellung elektrischer verbindungen - Google Patents

Verfahren zur herstellung elektrischer verbindungen

Info

Publication number
DE2307814A1
DE2307814A1 DE19732307814 DE2307814A DE2307814A1 DE 2307814 A1 DE2307814 A1 DE 2307814A1 DE 19732307814 DE19732307814 DE 19732307814 DE 2307814 A DE2307814 A DE 2307814A DE 2307814 A1 DE2307814 A1 DE 2307814A1
Authority
DE
Germany
Prior art keywords
layer
etching
film
aluminum
metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19732307814
Other languages
German (de)
English (en)
Inventor
Takashi Agatsuma
Akio Anzai
Akira Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2307814A1 publication Critical patent/DE2307814A1/de
Pending legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/10—Etching compositions
    • C23F1/14—Aqueous compositions
    • C23F1/16—Acidic compositions
    • C23F1/20—Acidic compositions for etching aluminium or alloys thereof
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32131—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by physical means only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • ing And Chemical Polishing (AREA)
DE19732307814 1972-02-18 1973-02-16 Verfahren zur herstellung elektrischer verbindungen Pending DE2307814A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP47016432A JPS5217995B2 (enExample) 1972-02-18 1972-02-18

Publications (1)

Publication Number Publication Date
DE2307814A1 true DE2307814A1 (de) 1973-08-30

Family

ID=11916061

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19732307814 Pending DE2307814A1 (de) 1972-02-18 1973-02-16 Verfahren zur herstellung elektrischer verbindungen

Country Status (4)

Country Link
US (1) US3825454A (enExample)
JP (1) JPS5217995B2 (enExample)
DE (1) DE2307814A1 (enExample)
NL (1) NL7302026A (enExample)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087367A (en) * 1974-10-18 1978-05-02 U.S. Philips Corporation Preferential etchant for aluminium oxide
FR2380636A1 (fr) * 1977-02-15 1978-09-08 Philips Nv Procede pour former une couche electriquement isolante sur un substrat
FR2432768A1 (fr) * 1978-06-22 1980-02-29 Western Electric Co Procede pour la metallisation des circuits integres
EP0469370A3 (en) * 1990-07-31 1992-09-09 Gold Star Co. Ltd Etching process for sloped side walls
EP0660381A1 (en) * 1993-12-21 1995-06-28 Koninklijke Philips Electronics N.V. Method of manufacturing a transparent conductor pattern and a liquid crystal display device
US5639344A (en) * 1994-05-11 1997-06-17 Semiconductor Energy Laboratory Co., Ltd. Etching material and etching process

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5525500B2 (enExample) * 1972-06-26 1980-07-07
JPS5062385A (enExample) * 1973-10-02 1975-05-28
US3936331A (en) * 1974-04-01 1976-02-03 Fairchild Camera And Instrument Corporation Process for forming sloped topography contact areas between polycrystalline silicon and single-crystal silicon
US4022930A (en) * 1975-05-30 1977-05-10 Bell Telephone Laboratories, Incorporated Multilevel metallization for integrated circuits
JPS5922337B2 (ja) * 1975-09-17 1984-05-25 ニホンアイ ビ− エム カブシキガイシヤ ガス・パネル装置の製造方法
US4082604A (en) * 1976-01-05 1978-04-04 Motorola, Inc. Semiconductor process
JPS52136590A (en) * 1976-05-11 1977-11-15 Matsushita Electric Ind Co Ltd Production of semiconductor device
US4098638A (en) * 1977-06-14 1978-07-04 Westinghouse Electric Corp. Methods for making a sloped insulator for solid state devices
JPS5539650A (en) * 1978-09-12 1980-03-19 Nec Corp Manufacture of semiconductor device
JPS5546587A (en) * 1978-09-29 1980-04-01 Nec Corp Method of forming plasma growing film
US4230522A (en) * 1978-12-26 1980-10-28 Rockwell International Corporation PNAF Etchant for aluminum and silicon
DE2903308A1 (de) * 1979-01-29 1980-08-28 Siemens Ag Verfahren zum herstellen von leitbahnstrukturen fuer integrierte halbleiterschaltungen
WO1984001966A1 (fr) * 1982-11-11 1984-05-24 Masahide Ichikawa Batterie utilisant du metal poreux d'aluminium
JP3111478B2 (ja) * 1991-02-06 2000-11-20 三菱電機株式会社 金属薄膜のテーパーエッチング方法及び薄膜トランジスタ
JP2614403B2 (ja) * 1993-08-06 1997-05-28 インターナショナル・ビジネス・マシーンズ・コーポレイション テーパエッチング方法
US6147395A (en) * 1996-10-02 2000-11-14 Micron Technology, Inc. Method for fabricating a small area of contact between electrodes
KR100271769B1 (ko) * 1998-06-25 2001-02-01 윤종용 반도체소자의 제조방법, 이를 위한 반도체소자 제조용 식각액조성물 및 반도체소자
JP4199206B2 (ja) * 2005-03-18 2008-12-17 シャープ株式会社 半導体装置の製造方法
WO2006137497A1 (ja) 2005-06-24 2006-12-28 Mitsubishi Gas Chemical Company, Inc. メタル材料用エッチング剤組成物およびそれを用いた半導体デバイスの製造方法
DE102006008261A1 (de) * 2006-02-22 2007-08-30 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Ätzlösung und Verfahren zur Strukturierung eines UBM-Schichtsystems

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4087367A (en) * 1974-10-18 1978-05-02 U.S. Philips Corporation Preferential etchant for aluminium oxide
FR2380636A1 (fr) * 1977-02-15 1978-09-08 Philips Nv Procede pour former une couche electriquement isolante sur un substrat
FR2432768A1 (fr) * 1978-06-22 1980-02-29 Western Electric Co Procede pour la metallisation des circuits integres
EP0469370A3 (en) * 1990-07-31 1992-09-09 Gold Star Co. Ltd Etching process for sloped side walls
EP0660381A1 (en) * 1993-12-21 1995-06-28 Koninklijke Philips Electronics N.V. Method of manufacturing a transparent conductor pattern and a liquid crystal display device
US5639344A (en) * 1994-05-11 1997-06-17 Semiconductor Energy Laboratory Co., Ltd. Etching material and etching process
US5885888A (en) * 1994-05-11 1999-03-23 Semiconductor Energy Laboratory Co., Ltd. Etching material and etching process

Also Published As

Publication number Publication date
JPS5217995B2 (enExample) 1977-05-19
JPS4887777A (enExample) 1973-11-17
NL7302026A (enExample) 1973-08-21
US3825454A (en) 1974-07-23

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