DE2263652A1 - Verfahren zur herstellung eines feldeffekttransistors mit isolierter gateelektrode - Google Patents

Verfahren zur herstellung eines feldeffekttransistors mit isolierter gateelektrode

Info

Publication number
DE2263652A1
DE2263652A1 DE2263652A DE2263652A DE2263652A1 DE 2263652 A1 DE2263652 A1 DE 2263652A1 DE 2263652 A DE2263652 A DE 2263652A DE 2263652 A DE2263652 A DE 2263652A DE 2263652 A1 DE2263652 A1 DE 2263652A1
Authority
DE
Germany
Prior art keywords
source
layer
zone
mask
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2263652A
Other languages
German (de)
English (en)
Inventor
Alfred Urquhart Macrae
Robert Alan Moline
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE2263652A1 publication Critical patent/DE2263652A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/112Constructional design considerations for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layers, e.g. by using channel stoppers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE2263652A 1971-12-28 1972-12-27 Verfahren zur herstellung eines feldeffekttransistors mit isolierter gateelektrode Pending DE2263652A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US21313271A 1971-12-28 1971-12-28

Publications (1)

Publication Number Publication Date
DE2263652A1 true DE2263652A1 (de) 1973-07-05

Family

ID=22793850

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2263652A Pending DE2263652A1 (de) 1971-12-28 1972-12-27 Verfahren zur herstellung eines feldeffekttransistors mit isolierter gateelektrode

Country Status (5)

Country Link
JP (1) JPS4874976A (cs)
BE (1) BE793244A (cs)
DE (1) DE2263652A1 (cs)
FR (1) FR2166078A1 (cs)
NL (1) NL7217513A (cs)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5611229B2 (cs) * 1974-05-28 1981-03-12
JPS5685867A (en) * 1979-12-14 1981-07-13 Nec Corp Field effect semiconductor device

Also Published As

Publication number Publication date
BE793244A (fr) 1973-04-16
JPS4874976A (cs) 1973-10-09
NL7217513A (cs) 1973-07-02
FR2166078A1 (cs) 1973-08-10

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