DE2255107A1 - Verfahren zum eindiffundieren von verunreinigungen in ein silizium-halbleitersubstrat - Google Patents

Verfahren zum eindiffundieren von verunreinigungen in ein silizium-halbleitersubstrat

Info

Publication number
DE2255107A1
DE2255107A1 DE19722255107 DE2255107A DE2255107A1 DE 2255107 A1 DE2255107 A1 DE 2255107A1 DE 19722255107 DE19722255107 DE 19722255107 DE 2255107 A DE2255107 A DE 2255107A DE 2255107 A1 DE2255107 A1 DE 2255107A1
Authority
DE
Germany
Prior art keywords
diffusion
impurities
polycrystalline silicon
silicon
semiconductor substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19722255107
Other languages
German (de)
English (en)
Inventor
Hiroshi Harigaya
Masao Kanai
Toshio Kano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suwa Seikosha KK
Original Assignee
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Suwa Seikosha KK filed Critical Suwa Seikosha KK
Publication of DE2255107A1 publication Critical patent/DE2255107A1/de
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B31/00Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
    • C30B31/02Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor by contacting with diffusion materials in the solid state
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE19722255107 1971-11-10 1972-11-10 Verfahren zum eindiffundieren von verunreinigungen in ein silizium-halbleitersubstrat Pending DE2255107A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP46089701A JPS4855663A (en:Method) 1971-11-10 1971-11-10

Publications (1)

Publication Number Publication Date
DE2255107A1 true DE2255107A1 (de) 1973-05-17

Family

ID=13978063

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722255107 Pending DE2255107A1 (de) 1971-11-10 1972-11-10 Verfahren zum eindiffundieren von verunreinigungen in ein silizium-halbleitersubstrat

Country Status (4)

Country Link
JP (1) JPS4855663A (en:Method)
CH (1) CH565452A5 (en:Method)
DE (1) DE2255107A1 (en:Method)
GB (1) GB1377699A (en:Method)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985004759A1 (en) * 1984-04-09 1985-10-24 American Telephone & Telegraph Company Method of transferring impurities between differently doped semiconductor regions

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5728942B2 (en:Method) * 1973-12-22 1982-06-19
JPS50134365A (en:Method) * 1974-04-09 1975-10-24
JPS50159253A (en:Method) * 1974-06-12 1975-12-23
DE2439408A1 (de) * 1974-08-16 1976-02-26 Siemens Ag Halbleiterbauelement
DE2449688C3 (de) * 1974-10-18 1980-07-10 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer dotierten Zone eines Leitfähigkeitstyps in einem Halbleiterkörper
JPS5153462A (en) * 1974-11-05 1976-05-11 Fujitsu Ltd Handotaisochino seizohoho
JPS5154365A (en) * 1974-11-06 1976-05-13 Mitsubishi Electric Corp Handotaisochino seizohoho
JPS5188174A (en) * 1975-01-31 1976-08-02 Handotaisochino seizohoho
JPS5222887A (en) * 1975-08-14 1977-02-21 Matsushita Electronics Corp Semiconductor unit manufacturing system
JPS58108767A (ja) * 1981-12-22 1983-06-28 Nec Corp 半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1985004759A1 (en) * 1984-04-09 1985-10-24 American Telephone & Telegraph Company Method of transferring impurities between differently doped semiconductor regions

Also Published As

Publication number Publication date
GB1377699A (en) 1974-12-18
CH565452A5 (en:Method) 1975-08-15
JPS4855663A (en:Method) 1973-08-04

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