DE2218892A1 - Dielektrisch isolierte Halbleiteran Ordnung und Verfahren zur Herstellung - Google Patents

Dielektrisch isolierte Halbleiteran Ordnung und Verfahren zur Herstellung

Info

Publication number
DE2218892A1
DE2218892A1 DE19722218892 DE2218892A DE2218892A1 DE 2218892 A1 DE2218892 A1 DE 2218892A1 DE 19722218892 DE19722218892 DE 19722218892 DE 2218892 A DE2218892 A DE 2218892A DE 2218892 A1 DE2218892 A1 DE 2218892A1
Authority
DE
Germany
Prior art keywords
semiconductor
layer
zone
zones
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19722218892
Other languages
German (de)
English (en)
Inventor
Ingrid Emese Magdo Steven Hopewell Junction NY Magdo (V St A )
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2218892A1 publication Critical patent/DE2218892A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE19722218892 1971-06-07 1972-04-19 Dielektrisch isolierte Halbleiteran Ordnung und Verfahren zur Herstellung Withdrawn DE2218892A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15060971A 1971-06-07 1971-06-07

Publications (1)

Publication Number Publication Date
DE2218892A1 true DE2218892A1 (de) 1972-12-21

Family

ID=22535286

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722218892 Withdrawn DE2218892A1 (de) 1971-06-07 1972-04-19 Dielektrisch isolierte Halbleiteran Ordnung und Verfahren zur Herstellung

Country Status (5)

Country Link
JP (1) JPS5116270B1 (enrdf_load_stackoverflow)
DE (1) DE2218892A1 (enrdf_load_stackoverflow)
FR (1) FR2140376B1 (enrdf_load_stackoverflow)
GB (1) GB1323850A (enrdf_load_stackoverflow)
IT (1) IT955882B (enrdf_load_stackoverflow)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5010101A (enrdf_load_stackoverflow) * 1973-05-25 1975-02-01

Also Published As

Publication number Publication date
FR2140376A1 (enrdf_load_stackoverflow) 1973-01-19
JPS5116270B1 (enrdf_load_stackoverflow) 1976-05-22
FR2140376B1 (enrdf_load_stackoverflow) 1974-06-28
IT955882B (it) 1973-09-29
GB1323850A (en) 1973-07-18

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Legal Events

Date Code Title Description
E77 Valid patent as to the heymanns-index 1977
OD Request for examination
8130 Withdrawal