DE2104132C3 - Anordnung zur Mehrfachfehlererkennung und Einzelfehlerkorrektur - Google Patents

Anordnung zur Mehrfachfehlererkennung und Einzelfehlerkorrektur

Info

Publication number
DE2104132C3
DE2104132C3 DE2104132A DE2104132A DE2104132C3 DE 2104132 C3 DE2104132 C3 DE 2104132C3 DE 2104132 A DE2104132 A DE 2104132A DE 2104132 A DE2104132 A DE 2104132A DE 2104132 C3 DE2104132 C3 DE 2104132C3
Authority
DE
Germany
Prior art keywords
data
bits
bit
check
data bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2104132A
Other languages
German (de)
English (en)
Other versions
DE2104132A1 (de
DE2104132B2 (de
Inventor
Mu-Yue Poughkeepsie N.Y. Hsiao (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2104132A1 publication Critical patent/DE2104132A1/de
Publication of DE2104132B2 publication Critical patent/DE2104132B2/de
Application granted granted Critical
Publication of DE2104132C3 publication Critical patent/DE2104132C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13Linear codes
    • H03M13/19Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041Arrangements at the transmitter end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0045Arrangements at the receiver end
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Detection And Correction Of Errors (AREA)
DE2104132A 1970-02-03 1971-01-29 Anordnung zur Mehrfachfehlererkennung und Einzelfehlerkorrektur Expired DE2104132C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US825170A 1970-02-03 1970-02-03

Publications (3)

Publication Number Publication Date
DE2104132A1 DE2104132A1 (de) 1971-08-12
DE2104132B2 DE2104132B2 (de) 1979-10-11
DE2104132C3 true DE2104132C3 (de) 1980-06-26

Family

ID=21730590

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2104132A Expired DE2104132C3 (de) 1970-02-03 1971-01-29 Anordnung zur Mehrfachfehlererkennung und Einzelfehlerkorrektur

Country Status (8)

Country Link
US (1) US3601798A (https=)
JP (1) JPS521628B1 (https=)
CA (1) CA932467A (https=)
CH (1) CH509628A (https=)
DE (1) DE2104132C3 (https=)
FR (1) FR2078453A5 (https=)
GB (1) GB1279792A (https=)
NL (1) NL169648C (https=)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3697948A (en) * 1970-12-18 1972-10-10 Ibm Apparatus for correcting two groups of multiple errors
US3688265A (en) * 1971-03-18 1972-08-29 Ibm Error-free decoding for failure-tolerant memories
US3913075A (en) * 1972-11-21 1975-10-14 Vitaliev Georgy Associative memory
US4276646A (en) * 1979-11-05 1981-06-30 Texas Instruments Incorporated Method and apparatus for detecting errors in a data set
US4321704A (en) * 1980-02-01 1982-03-23 Ampex Corporation Parity checking circuitry for use in multi-bit cell PCM recording and reproducing apparatus
US4604751A (en) * 1984-06-29 1986-08-05 International Business Machines Corporation Error logging memory system for avoiding miscorrection of triple errors
US4868829A (en) * 1987-09-29 1989-09-19 Hewlett-Packard Company Apparatus useful for correction of single bit errors in the transmission of data
EP0386506A3 (en) 1989-03-06 1991-09-25 International Business Machines Corporation Low cost symbol error correction coding and decoding
US5539754A (en) * 1992-10-05 1996-07-23 Hewlett-Packard Company Method and circuitry for generating syndrome bits within an error correction and detection circuit
US5457702A (en) * 1993-11-05 1995-10-10 The United States Of America As Represented By The Secretary Of The Navy Check bit code circuit for simultaneous single bit error correction and burst error detection

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL267314A (https=) * 1960-03-02
US3383655A (en) * 1964-09-24 1968-05-14 Radiation Inc Code converters
US3474413A (en) * 1965-11-22 1969-10-21 Dryden Hugh L Parallel generation of the check bits of a pn sequence
US3504340A (en) * 1967-05-08 1970-03-31 Ibm Triple error correction circuit

Also Published As

Publication number Publication date
DE2104132A1 (de) 1971-08-12
NL169648C (nl) 1982-08-02
JPS521628B1 (https=) 1977-01-17
CA932467A (en) 1973-08-21
GB1279792A (en) 1972-06-28
US3601798A (en) 1971-08-24
DE2104132B2 (de) 1979-10-11
FR2078453A5 (https=) 1971-11-05
NL7101390A (https=) 1971-08-05
CH509628A (de) 1971-06-30
NL169648B (nl) 1982-03-01

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee