DE2102854C3 - Verfahren zur Herstellung eines Festwertspeichers - Google Patents

Verfahren zur Herstellung eines Festwertspeichers

Info

Publication number
DE2102854C3
DE2102854C3 DE2102854A DE2102854A DE2102854C3 DE 2102854 C3 DE2102854 C3 DE 2102854C3 DE 2102854 A DE2102854 A DE 2102854A DE 2102854 A DE2102854 A DE 2102854A DE 2102854 C3 DE2102854 C3 DE 2102854C3
Authority
DE
Germany
Prior art keywords
memory
read
insulating layer
switching elements
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2102854A
Other languages
German (de)
English (en)
Other versions
DE2102854A1 (de
DE2102854B2 (de
Inventor
Heinrich Dipl.-Phys. Dr. 8019 Ebersberg Schloetterer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE2102854A priority Critical patent/DE2102854C3/de
Priority to NL7115829A priority patent/NL7115829A/xx
Priority to BE778166A priority patent/BE778166A/xx
Priority to LU64616D priority patent/LU64616A1/xx
Priority to IT19534/72A priority patent/IT946699B/it
Priority to GB283272A priority patent/GB1373996A/en
Priority to FR7201923A priority patent/FR2122557B1/fr
Priority to JP824872A priority patent/JPS5716440B1/ja
Publication of DE2102854A1 publication Critical patent/DE2102854A1/de
Publication of DE2102854B2 publication Critical patent/DE2102854B2/de
Application granted granted Critical
Publication of DE2102854C3 publication Critical patent/DE2102854C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H10W74/43—

Landscapes

  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE2102854A 1971-01-21 1971-01-21 Verfahren zur Herstellung eines Festwertspeichers Expired DE2102854C3 (de)

Priority Applications (8)

Application Number Priority Date Filing Date Title
DE2102854A DE2102854C3 (de) 1971-01-21 1971-01-21 Verfahren zur Herstellung eines Festwertspeichers
NL7115829A NL7115829A (enExample) 1971-01-21 1971-11-17
BE778166A BE778166A (fr) 1971-01-21 1972-01-18 Procede pour la fabrication d'une memoire
IT19534/72A IT946699B (it) 1971-01-21 1972-01-19 Procedimento per fabbricare una memoria fissa
LU64616D LU64616A1 (enExample) 1971-01-21 1972-01-19
GB283272A GB1373996A (en) 1971-01-21 1972-01-20 Method of manufacturing a fixed value store
FR7201923A FR2122557B1 (enExample) 1971-01-21 1972-01-20
JP824872A JPS5716440B1 (enExample) 1971-01-21 1972-01-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2102854A DE2102854C3 (de) 1971-01-21 1971-01-21 Verfahren zur Herstellung eines Festwertspeichers

Publications (3)

Publication Number Publication Date
DE2102854A1 DE2102854A1 (de) 1972-08-03
DE2102854B2 DE2102854B2 (de) 1973-03-15
DE2102854C3 true DE2102854C3 (de) 1973-10-11

Family

ID=5796572

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2102854A Expired DE2102854C3 (de) 1971-01-21 1971-01-21 Verfahren zur Herstellung eines Festwertspeichers

Country Status (8)

Country Link
JP (1) JPS5716440B1 (enExample)
BE (1) BE778166A (enExample)
DE (1) DE2102854C3 (enExample)
FR (1) FR2122557B1 (enExample)
GB (1) GB1373996A (enExample)
IT (1) IT946699B (enExample)
LU (1) LU64616A1 (enExample)
NL (1) NL7115829A (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4064495A (en) * 1976-03-22 1977-12-20 General Electric Company Ion implanted archival memory media and methods for storage of data therein
DE3036869C2 (de) * 1979-10-01 1985-09-05 Hitachi, Ltd., Tokio/Tokyo Integrierte Halbleiterschaltung und Schaltkreisaktivierverfahren
US4476478A (en) * 1980-04-24 1984-10-09 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor read only memory and method of making the same
FR2551247B1 (fr) * 1983-08-23 1988-06-17 Rosencher Emmanuel Memoire integree non volatile reinscriptible, procede de fabrication de cette memoire et dispositif d'ecriture dans celle-ci

Also Published As

Publication number Publication date
JPS5716440B1 (enExample) 1982-04-05
GB1373996A (en) 1974-11-13
FR2122557A1 (enExample) 1972-09-01
LU64616A1 (enExample) 1972-06-26
IT946699B (it) 1973-05-21
NL7115829A (enExample) 1972-07-25
FR2122557B1 (enExample) 1976-07-09
DE2102854A1 (de) 1972-08-03
BE778166A (fr) 1972-05-16
DE2102854B2 (de) 1973-03-15

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977