DE1589917A1 - Verfahren zur Herstellung von Planartransistoren - Google Patents
Verfahren zur Herstellung von PlanartransistorenInfo
- Publication number
- DE1589917A1 DE1589917A1 DE19671589917 DE1589917A DE1589917A1 DE 1589917 A1 DE1589917 A1 DE 1589917A1 DE 19671589917 DE19671589917 DE 19671589917 DE 1589917 A DE1589917 A DE 1589917A DE 1589917 A1 DE1589917 A1 DE 1589917A1
- Authority
- DE
- Germany
- Prior art keywords
- diffusion
- zones
- zone
- diffusion process
- distance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B31/00—Diffusion or doping processes for single crystals or homogeneous polycrystalline material with defined structure; Apparatus therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/40—Resistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/145—Shaped junctions
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Bipolar Transistors (AREA)
- Thyristors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US520621A US3389023A (en) | 1966-01-14 | 1966-01-14 | Methods of making a narrow emitter transistor by masking and diffusion |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE1589917A1 true DE1589917A1 (de) | 1970-06-04 |
Family
ID=24073385
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19671589917 Pending DE1589917A1 (de) | 1966-01-14 | 1967-01-05 | Verfahren zur Herstellung von Planartransistoren |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US3389023A (enExample) |
| BE (1) | BE692593A (enExample) |
| CH (1) | CH455054A (enExample) |
| DE (1) | DE1589917A1 (enExample) |
| FR (1) | FR1508601A (enExample) |
| GB (1) | GB1142068A (enExample) |
| NL (1) | NL6700625A (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1099049A (en) * | 1965-12-28 | 1968-01-10 | Telefunken Patent | A method of manufacturing transistors |
| GB1153497A (en) * | 1966-07-25 | 1969-05-29 | Associated Semiconductor Mft | Improvements in and relating to Semiconductor Devices |
| US3489622A (en) * | 1967-05-18 | 1970-01-13 | Ibm | Method of making high frequency transistors |
| JPS5148286A (en) * | 1974-10-23 | 1976-04-24 | Mitsubishi Electric Corp | Shusekikairogatasenkeizofukuki |
| JPS6410951B2 (enExample) * | 1979-12-28 | 1989-02-22 | Intaanashonaru Bijinesu Mashiinzu Corp |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3281915A (en) * | 1963-04-02 | 1966-11-01 | Rca Corp | Method of fabricating a semiconductor device |
| US3319311A (en) * | 1963-05-24 | 1967-05-16 | Ibm | Semiconductor devices and their fabrication |
-
1966
- 1966-01-14 US US520621A patent/US3389023A/en not_active Expired - Lifetime
- 1966-12-05 GB GB54311/66A patent/GB1142068A/en not_active Expired
-
1967
- 1967-01-05 DE DE19671589917 patent/DE1589917A1/de active Pending
- 1967-01-11 FR FR8285A patent/FR1508601A/fr not_active Expired
- 1967-01-13 CH CH52467A patent/CH455054A/de unknown
- 1967-01-13 NL NL6700625A patent/NL6700625A/xx unknown
- 1967-01-13 BE BE692593D patent/BE692593A/xx unknown
Also Published As
| Publication number | Publication date |
|---|---|
| CH455054A (de) | 1968-04-30 |
| GB1142068A (en) | 1969-02-05 |
| BE692593A (enExample) | 1967-06-16 |
| NL6700625A (enExample) | 1967-07-17 |
| FR1508601A (fr) | 1968-01-05 |
| US3389023A (en) | 1968-06-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE2262297C2 (de) | Monolithisch integrierbare, logisch verknüpfbare Halbleiterschaltungsanordnung mit I↑2↑L-Aufbau | |
| DE2818090A1 (de) | Bipolartransistor und verfahren zur herstellung desselben | |
| DE2812740A1 (de) | Verfahren zum herstellen einer vertikalen, bipolaren integrierten schaltung | |
| DE2541548A1 (de) | Isolierschicht-feldeffekttransistor und verfahren zu dessen herstellung | |
| DE2728167A1 (de) | Verfahren zur vorbereitung eines siliziumsubstrats fuer die herstellung von mos-bauelementen | |
| DE1514915C2 (de) | Verfahren zum Herstellen einer Halbleiteranordnung mit einem extrem kleinflächigen pn-Übergang | |
| EP0006510B1 (de) | Verfahren zum Erzeugen aneinander grenzender, unterschiedlich dotierter Siliciumbereiche | |
| DE2546314A1 (de) | Feldeffekt-transistorstruktur und verfahren zur herstellung | |
| DE3545040A1 (de) | Verfahren zur herstellung einer vergrabenen schicht und einer kollektorzone in einer monolithischen halbleitervorrichtung | |
| DE1564218A1 (de) | Verfahren zur Herstellung von Transistoren | |
| DE1903870A1 (de) | Verfahren zum Herstellen monolithischer Halbleiteranordnungen | |
| DE3022122C2 (enExample) | ||
| DE69033593T2 (de) | Verfahren zur Herstellung einer integrierten Halbleiterschaltung mit einer Isolationszone | |
| DE2048737A1 (de) | Verfahren zur Herstellung integrierter Transistoren | |
| DE2904480A1 (de) | Integrierte halbleiterschaltung und verfahren zu ihrem herstellen | |
| DE1918054A1 (de) | Verfahren zur Herstellung von Halbleiter-Bauelementen | |
| DE1589917A1 (de) | Verfahren zur Herstellung von Planartransistoren | |
| DE2800363C2 (de) | Halbleiteranordnung und Verfahren zu deren Herstellung | |
| DE2100224C3 (de) | Maskierungs- und Metallisierungsverfahren bei der Herstellung von Halbleiterzonen | |
| DE2219696A1 (de) | Verfahren zur Isolationsbereichsbildung | |
| DE3005367C2 (enExample) | ||
| DE2627922A1 (de) | Halbleiterbauteil | |
| DE68922212T2 (de) | Halbleiteranordnung, die eine integrierte schaltung mit einem vertikalen transistor enthält. | |
| EP0103653A1 (de) | Verfahren zum Herstellen einer monolithisch integrierten Schaltung mit mindestens einem bipolaren Planartransistor | |
| DE2507038B2 (de) | Inverser Planartransistor und Verfahren zu seiner Herstellung |