DE1521990A1 - Verfahren zum Bedecken zweier eng benachbarter Bereiche einer Halbleiteroberflaeche mit Dotierungs- und/oder Elektroden-Material - Google Patents

Verfahren zum Bedecken zweier eng benachbarter Bereiche einer Halbleiteroberflaeche mit Dotierungs- und/oder Elektroden-Material

Info

Publication number
DE1521990A1
DE1521990A1 DE19661521990 DE1521990A DE1521990A1 DE 1521990 A1 DE1521990 A1 DE 1521990A1 DE 19661521990 DE19661521990 DE 19661521990 DE 1521990 A DE1521990 A DE 1521990A DE 1521990 A1 DE1521990 A1 DE 1521990A1
Authority
DE
Germany
Prior art keywords
area
semiconductor surface
coverage
covering
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19661521990
Other languages
German (de)
English (en)
Inventor
Dipl-Phys Wolfgang Schembs
Meer Dipl-Phys Winfried
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of DE1521990A1 publication Critical patent/DE1521990A1/de
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/02Local etching
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/042Coating on selected surface areas, e.g. using masks using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Drying Of Semiconductors (AREA)
DE19661521990 1966-02-11 1966-02-11 Verfahren zum Bedecken zweier eng benachbarter Bereiche einer Halbleiteroberflaeche mit Dotierungs- und/oder Elektroden-Material Pending DE1521990A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0101951 1966-02-11

Publications (1)

Publication Number Publication Date
DE1521990A1 true DE1521990A1 (de) 1970-02-05

Family

ID=7524100

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19661521990 Pending DE1521990A1 (de) 1966-02-11 1966-02-11 Verfahren zum Bedecken zweier eng benachbarter Bereiche einer Halbleiteroberflaeche mit Dotierungs- und/oder Elektroden-Material

Country Status (7)

Country Link
AT (1) AT265371B (enrdf_load_stackoverflow)
CH (1) CH485325A (enrdf_load_stackoverflow)
DE (1) DE1521990A1 (enrdf_load_stackoverflow)
FR (1) FR1511237A (enrdf_load_stackoverflow)
GB (1) GB1113489A (enrdf_load_stackoverflow)
NL (1) NL6616165A (enrdf_load_stackoverflow)
SE (1) SE340027B (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2186424A (en) * 1986-01-30 1987-08-12 Plessey Co Plc Method for producing integrated circuit interconnects

Also Published As

Publication number Publication date
AT265371B (de) 1968-10-10
CH485325A (de) 1970-01-31
SE340027B (enrdf_load_stackoverflow) 1971-11-01
FR1511237A (fr) 1968-01-26
GB1113489A (en) 1968-05-15
NL6616165A (enrdf_load_stackoverflow) 1967-08-14

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