GB1113489A - Improvements in or relating to the covering of two closely adjacent but not contiguous regions of a semiconductor surface - Google Patents

Improvements in or relating to the covering of two closely adjacent but not contiguous regions of a semiconductor surface

Info

Publication number
GB1113489A
GB1113489A GB645267A GB645267A GB1113489A GB 1113489 A GB1113489 A GB 1113489A GB 645267 A GB645267 A GB 645267A GB 645267 A GB645267 A GB 645267A GB 1113489 A GB1113489 A GB 1113489A
Authority
GB
United Kingdom
Prior art keywords
region
layer
covering
etchresistant
semi
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB645267A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1113489A publication Critical patent/GB1113489A/en
Expired legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04—Coating on selected surface areas, e.g. using masks
    • C23C14/042—Coating on selected surface areas, e.g. using masks using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

1,113,489. Semi-conductor devices. SIEMENS A.G. 10 Feb., 1967 [11 Feb., 1966], No. 6452/67. Heading H1K. Two non-contiguous closely adjacent regions 2a/2b and 2c of a semi-conductor surface are covered with doping and/or electrode-forming material 2, 4 by a process involving covering at least the first region 2a/2b with the material 2, covering the material 2 on the region 2a/2b with an etch-resistant layer 3 which leaves the second region 2c free, etching the region 2c, and then depositing the material 4 on to the region 2c. The etch-resistant layer 3 is then removed. In the embodiment shown the material 2 is deposited over the entire surface. The etchresistant layer 3 may be of a photo-varnish or of silicon dioxide, and during the etching process to remove the material 2 from the circular region 2c the layer 3 is slightly undercut, as shown. Deposition of the material 4 is then performed by vapour deposition or by a beam of material, such as by cathode sputtering or with an ion beam. The shade effect of the undercut thus separates material 4 from material 2. The etching of the region 2c may be continued so as to form a trough in the semi-conductor surface in which the doping or electrode material 4 is deposited. Additional masking, e.g. of etchresistant material, may be applied after removal of the excess material 2 to protect other parts of the surface against being covered by the material 4. The second region 2c may, in this case, be defined partly by the first etchresistant layer 3 and partly by the additional mask. The invention may be applied to transistors of planar or mesa form.
GB645267A 1966-02-11 1967-02-10 Improvements in or relating to the covering of two closely adjacent but not contiguous regions of a semiconductor surface Expired GB1113489A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0101951 1966-02-11

Publications (1)

Publication Number Publication Date
GB1113489A true GB1113489A (en) 1968-05-15

Family

ID=7524100

Family Applications (1)

Application Number Title Priority Date Filing Date
GB645267A Expired GB1113489A (en) 1966-02-11 1967-02-10 Improvements in or relating to the covering of two closely adjacent but not contiguous regions of a semiconductor surface

Country Status (7)

Country Link
AT (1) AT265371B (en)
CH (1) CH485325A (en)
DE (1) DE1521990A1 (en)
FR (1) FR1511237A (en)
GB (1) GB1113489A (en)
NL (1) NL6616165A (en)
SE (1) SE340027B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2186424A (en) * 1986-01-30 1987-08-12 Plessey Co Plc Method for producing integrated circuit interconnects

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2186424A (en) * 1986-01-30 1987-08-12 Plessey Co Plc Method for producing integrated circuit interconnects

Also Published As

Publication number Publication date
AT265371B (en) 1968-10-10
NL6616165A (en) 1967-08-14
CH485325A (en) 1970-01-31
FR1511237A (en) 1968-01-26
SE340027B (en) 1971-11-01
DE1521990A1 (en) 1970-02-05

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