DE1236083B - Legierungsverfahren zum Herstellen von Anschluessen an Halbleiterbauelementen - Google Patents

Legierungsverfahren zum Herstellen von Anschluessen an Halbleiterbauelementen

Info

Publication number
DE1236083B
DE1236083B DEW34577A DEW0034577A DE1236083B DE 1236083 B DE1236083 B DE 1236083B DE W34577 A DEW34577 A DE W34577A DE W0034577 A DEW0034577 A DE W0034577A DE 1236083 B DE1236083 B DE 1236083B
Authority
DE
Germany
Prior art keywords
layer
semiconductor
oxide layer
aluminum
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEW34577A
Other languages
German (de)
English (en)
Inventor
Rudolf Schmidt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE1236083B publication Critical patent/DE1236083B/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49204Contact or terminal manufacturing
    • Y10T29/49224Contact or terminal manufacturing with coating

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DEW34577A 1962-06-29 1963-05-25 Legierungsverfahren zum Herstellen von Anschluessen an Halbleiterbauelementen Pending DE1236083B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US206242A US3231421A (en) 1962-06-29 1962-06-29 Semiconductor contact

Publications (1)

Publication Number Publication Date
DE1236083B true DE1236083B (de) 1967-03-09

Family

ID=22765544

Family Applications (1)

Application Number Title Priority Date Filing Date
DEW34577A Pending DE1236083B (de) 1962-06-29 1963-05-25 Legierungsverfahren zum Herstellen von Anschluessen an Halbleiterbauelementen

Country Status (5)

Country Link
US (1) US3231421A (US08063081-20111122-C00044.png)
BE (1) BE634311A (US08063081-20111122-C00044.png)
DE (1) DE1236083B (US08063081-20111122-C00044.png)
GB (1) GB1030927A (US08063081-20111122-C00044.png)
NL (1) NL294675A (US08063081-20111122-C00044.png)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1065192A (en) * 1963-09-03 1967-04-12 Rosemount Eng Co Ltd Pressure gauge
US3290127A (en) * 1964-03-30 1966-12-06 Bell Telephone Labor Inc Barrier diode with metal contact and method of making
US3325702A (en) * 1964-04-21 1967-06-13 Texas Instruments Inc High temperature electrical contacts for silicon devices
US3408237A (en) * 1964-06-30 1968-10-29 Ibm Ductile case-hardened steels
US3297921A (en) * 1965-04-15 1967-01-10 Int Rectifier Corp Controlled rectifier having shunted emitter formed by a nickel layer underneath an aluminum layer
US3442701A (en) * 1965-05-19 1969-05-06 Bell Telephone Labor Inc Method of fabricating semiconductor contacts
US3400308A (en) * 1965-06-22 1968-09-03 Rca Corp Metallic contacts for semiconductor devices
US3368124A (en) * 1965-12-09 1968-02-06 Rca Corp Semiconductor devices
US3492174A (en) * 1966-03-19 1970-01-27 Sony Corp Method of making a semiconductor device
US3445727A (en) * 1967-05-15 1969-05-20 Raytheon Co Semiconductor contact and interconnection structure
US3495324A (en) * 1967-11-13 1970-02-17 Sperry Rand Corp Ohmic contact for planar devices
US3629022A (en) * 1968-03-20 1971-12-21 Motorola Inc Use of platinum thin films as mask in semiconductor processing
US3642528A (en) * 1968-06-05 1972-02-15 Matsushita Electronics Corp Semiconductor device and method of making same
US3769688A (en) * 1972-04-21 1973-11-06 Rca Corp Method of making an electrically-insulating seal between a metal body and a semiconductor device
US3983284A (en) * 1972-06-02 1976-09-28 Thomson-Csf Flat connection for a semiconductor multilayer structure
US3894872A (en) * 1974-07-17 1975-07-15 Rca Corp Technique for fabricating high Q MIM capacitors
US3965279A (en) * 1974-09-03 1976-06-22 Bell Telephone Laboratories, Incorporated Ohmic contacts for group III-V n-type semiconductors
US4286277A (en) * 1977-11-22 1981-08-25 The United States Of America As Represented By The Secretary Of The Army Planar indium antimonide diode array and method of manufacture
JP2631369B2 (ja) * 1987-01-19 1997-07-16 三菱電機株式会社 半導体装置
US5563449A (en) * 1995-01-19 1996-10-08 Cornell Research Foundation, Inc. Interconnect structures using group VIII metals
DE19828846C2 (de) * 1998-06-27 2001-01-18 Micronas Gmbh Verfahren zum Beschichten eines Substrats

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1254861A (fr) * 1955-11-04 1961-02-24 Fairchild Semiconductor Transistor et son procédé de fabrication

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2829422A (en) * 1952-05-21 1958-04-08 Bell Telephone Labor Inc Methods of fabricating semiconductor signal translating devices
NL191674A (US08063081-20111122-C00044.png) * 1953-10-26
US2861230A (en) * 1953-11-24 1958-11-18 Gen Electric Calorized point contact electrode for semiconductor devices
NL121810C (US08063081-20111122-C00044.png) * 1955-11-04
NL210216A (US08063081-20111122-C00044.png) * 1955-12-02
US2981877A (en) * 1959-07-30 1961-04-25 Fairchild Semiconductor Semiconductor device-and-lead structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1254861A (fr) * 1955-11-04 1961-02-24 Fairchild Semiconductor Transistor et son procédé de fabrication

Also Published As

Publication number Publication date
GB1030927A (en) 1966-05-25
BE634311A (US08063081-20111122-C00044.png)
NL294675A (US08063081-20111122-C00044.png)
US3231421A (en) 1966-01-25

Similar Documents

Publication Publication Date Title
DE1236083B (de) Legierungsverfahren zum Herstellen von Anschluessen an Halbleiterbauelementen
DE2640525C2 (de) Verfahren zur Herstellung einer MIS-Halbleiterschaltungsanordnung
DE1200439B (de) Verfahren zum Herstellen eines elektrischen Kontaktes an einem oxydueberzogenen Halbleiterplaettchen
DE3135993A1 (de) "verfahren zur herstellung von kontakten mit geringem widerstand in halbleitervorrichtungen"
DE2729171A1 (de) Verfahren zur herstellung von integrierten schaltungen
DE1789106A1 (de) Halbleiteranordnung
DE2215357A1 (de) Verfahren zum Herstellen eines intermetallischen Kontakts an einem Halbleiterbauteil
DE1614283B2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE2142146B2 (de) Verfahren zum gleichzeitigen Herstellen mehrerer Halbleiterbauelemente
DE1806835C3 (de) Solarzelle und Verfahren zur Herstellung ihrer Kontakte
DE2033532A1 (de) Kontaktsystem fur Halbleiteranordnungen
DE1764847B2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE3316417A1 (de) Solarzelle
DE1489250C3 (de) Transistor mit mehreren emitterzonen
DE1934859A1 (de) Verfahren zum Herstellen einer Mehrzahl von Halbleiteranordnungen
DE1231812B (de) Verfahren zur Herstellung von elektrischen Halbleiterbauelementen nach der Mesa-Diffusionstechnik
DE1414538A1 (de) Unterschiedliche Leitfaehigkeitszonen aufweisende Halbleiteranordnung und Verfahren zu dessen Herstellung
DE2033419A1 (de) Verfahren zum Herstellen von komplemen taren gitterisoherten Feldeffekttransis toren
DE1539853A1 (de) Integrierte elektronische Halbleiterschaltung und Verfahren zu deren Herstellung
DE2112114C3 (de) Verfahren zur Herstellung eines Hochfrequenz-Planar-Siliziumtran sistors
DE2516393A1 (de) Verfahren zum herstellen von metall- oxyd-halbleiter-schaltungen
DE3626598A1 (de) Verfahren zum herstellen eines mos-feldeffekttransistors in einer integrierten schaltung
DE1514673A1 (de) Verfahren zum Herstellen eines Transistors
DE2408402A1 (de) Verfahren zur herstellung integrierter schaltungen bzw. nach einem solchen verfahren hergestellte integrierte halbleiterschaltungseinheit
DE2100292A1 (de) Halbleiteranordnung mit relativ kleinen geometrischen Abmessungen und Verfahren zur Herstellung derselben