DE1151398B - Verfahren und Einrichtung zur Multiplikation binaerer Zahlen - Google Patents

Verfahren und Einrichtung zur Multiplikation binaerer Zahlen

Info

Publication number
DE1151398B
DE1151398B DEJ21045A DEJ0021045A DE1151398B DE 1151398 B DE1151398 B DE 1151398B DE J21045 A DEJ21045 A DE J21045A DE J0021045 A DEJ0021045 A DE J0021045A DE 1151398 B DE1151398 B DE 1151398B
Authority
DE
Germany
Prior art keywords
register
result
calculation step
multiplicand
multiplier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEJ21045A
Other languages
German (de)
English (en)
Inventor
Pierre Jean Foursin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Publication of DE1151398B publication Critical patent/DE1151398B/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
    • G06F7/5334—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product
    • G06F7/5336—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm
    • G06F7/5338—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by using multiple bit scanning, i.e. by decoding groups of successive multiplier bits in order to select an appropriate precalculated multiple of the multiplicand as a partial product overlapped, i.e. with successive bitgroups sharing one or more bits being recoded into signed digit representation, e.g. using the Modified Booth Algorithm each bitgroup having two new bits, e.g. 2nd order MBA
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4915—Multiplying; Dividing

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
DEJ21045A 1960-12-29 1961-12-19 Verfahren und Einrichtung zur Multiplikation binaerer Zahlen Pending DE1151398B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR848276A FR1283965A (fr) 1960-12-29 1960-12-29 Circuit de multiplication binaire

Publications (1)

Publication Number Publication Date
DE1151398B true DE1151398B (de) 1963-07-11

Family

ID=8745697

Family Applications (1)

Application Number Title Priority Date Filing Date
DEJ21045A Pending DE1151398B (de) 1960-12-29 1961-12-19 Verfahren und Einrichtung zur Multiplikation binaerer Zahlen

Country Status (4)

Country Link
CH (1) CH395592A (fr)
DE (1) DE1151398B (fr)
FR (1) FR1283965A (fr)
GB (1) GB945527A (fr)

Also Published As

Publication number Publication date
FR1283965A (fr) 1962-02-09
CH395592A (fr) 1965-07-15
GB945527A (en) 1964-01-02

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