DE112022005614T5 - Taktübertragungsschaltung, bildgebendes Element und Verfahren zur Herstellung einer Taktübertragungsschaltung - Google Patents

Taktübertragungsschaltung, bildgebendes Element und Verfahren zur Herstellung einer Taktübertragungsschaltung Download PDF

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Publication number
DE112022005614T5
DE112022005614T5 DE112022005614.2T DE112022005614T DE112022005614T5 DE 112022005614 T5 DE112022005614 T5 DE 112022005614T5 DE 112022005614 T DE112022005614 T DE 112022005614T DE 112022005614 T5 DE112022005614 T5 DE 112022005614T5
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DE
Germany
Prior art keywords
circuit
region
regions
clock
elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022005614.2T
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German (de)
English (en)
Inventor
Hidetoshi Yoshimura
Tasuku Joboji
Yukinobu Sugiyama
Riku YONEKAWA
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hamamatsu Photonics KK
Original Assignee
Hamamatsu Photonics KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hamamatsu Photonics KK filed Critical Hamamatsu Photonics KK
Publication of DE112022005614T5 publication Critical patent/DE112022005614T5/de
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/779—Circuitry for scanning or addressing the pixel array
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/7795—Circuitry for generating timing or clock signals
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
    • H03K5/1506—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs with parallel driven output stages; with synchronously driven series connected output stages
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/617—Noise processing, e.g. detecting, correcting, reducing or removing noise for reducing electromagnetic interference, e.g. clocking noise
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Manipulation Of Pulses (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
DE112022005614.2T 2021-11-22 2022-09-29 Taktübertragungsschaltung, bildgebendes Element und Verfahren zur Herstellung einer Taktübertragungsschaltung Pending DE112022005614T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021-189281 2021-11-22
JP2021189281A JP7724693B2 (ja) 2021-11-22 2021-11-22 クロック伝達回路、撮像素子、及びクロック伝達回路の製造方法
PCT/JP2022/036575 WO2023089964A1 (ja) 2021-11-22 2022-09-29 クロック伝達回路、撮像素子、及びクロック伝達回路の製造方法

Publications (1)

Publication Number Publication Date
DE112022005614T5 true DE112022005614T5 (de) 2024-09-19

Family

ID=86396770

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022005614.2T Pending DE112022005614T5 (de) 2021-11-22 2022-09-29 Taktübertragungsschaltung, bildgebendes Element und Verfahren zur Herstellung einer Taktübertragungsschaltung

Country Status (8)

Country Link
US (1) US12604116B2 (https=)
JP (2) JP7724693B2 (https=)
KR (1) KR20240108480A (https=)
CN (1) CN118266171A (https=)
DE (1) DE112022005614T5 (https=)
GB (1) GB2628256A (https=)
TW (1) TW202331808A (https=)
WO (1) WO2023089964A1 (https=)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110708A (ja) 1999-10-08 2001-04-20 Nikon Corp 露光装置
JP2001154371A (ja) 1999-11-30 2001-06-08 Nikon Corp 回路デバイスや表示デバイスの製造方法、及び大型ディスプレー装置
JP2007060036A (ja) 2005-08-22 2007-03-08 Micron Technology Inc 構造化遅延スキューを用いたバッファリング技術

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3271602B2 (ja) 1999-02-17 2002-04-02 日本電気株式会社 半導体集積回路装置およびその設計方法
US6255884B1 (en) * 2000-02-16 2001-07-03 Pairgain Technologies, Inc. Uniform clock timing circuit
US6879185B2 (en) 2002-04-05 2005-04-12 Stmicroelectronics Pvt. Ltd. Low power clock distribution scheme
US7382170B2 (en) 2006-04-18 2008-06-03 Agere Systems Inc. Programmable delay circuit having reduced insertion delay
JP5619434B2 (ja) * 2010-02-26 2014-11-05 パナソニック株式会社 固体撮像装置および撮像装置
US8937491B2 (en) 2012-11-15 2015-01-20 Xilinx, Inc. Clock network architecture
US9698766B2 (en) 2014-12-03 2017-07-04 Micron Technology, Inc. Apparatuses and methods for adjusting timing of signals
KR102327498B1 (ko) 2017-09-12 2021-11-17 에스케이하이닉스 주식회사 듀티 싸이클 보정 회로 및 이를 포함하는 클럭 보정 회로
CN113841103A (zh) 2019-05-24 2021-12-24 索尼半导体解决方案公司 电路系统
KR102827206B1 (ko) * 2019-09-02 2025-07-01 삼성전자주식회사 클럭 트리를 포함하는 이미지 센서 및 어드레스 디코더, 이미지 센서를 포함하는 이미지 처리 시스템

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001110708A (ja) 1999-10-08 2001-04-20 Nikon Corp 露光装置
JP2001154371A (ja) 1999-11-30 2001-06-08 Nikon Corp 回路デバイスや表示デバイスの製造方法、及び大型ディスプレー装置
JP2007060036A (ja) 2005-08-22 2007-03-08 Micron Technology Inc 構造化遅延スキューを用いたバッファリング技術

Also Published As

Publication number Publication date
US20250008241A1 (en) 2025-01-02
WO2023089964A1 (ja) 2023-05-25
US12604116B2 (en) 2026-04-14
CN118266171A (zh) 2024-06-28
TW202331808A (zh) 2023-08-01
KR20240108480A (ko) 2024-07-09
GB202408578D0 (en) 2024-07-31
JP7724693B2 (ja) 2025-08-18
JP2023076093A (ja) 2023-06-01
GB2628256A (en) 2024-09-18
JP2025168357A (ja) 2025-11-07

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