DE112022004933T5 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung Download PDF

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Publication number
DE112022004933T5
DE112022004933T5 DE112022004933.2T DE112022004933T DE112022004933T5 DE 112022004933 T5 DE112022004933 T5 DE 112022004933T5 DE 112022004933 T DE112022004933 T DE 112022004933T DE 112022004933 T5 DE112022004933 T5 DE 112022004933T5
Authority
DE
Germany
Prior art keywords
resistors
resistance circuit
real
region
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112022004933.2T
Other languages
German (de)
English (en)
Inventor
Keiji Wada
Kazumasa Nishio
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112022004933T5 publication Critical patent/DE112022004933T5/de
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01CRESISTORS
    • H01C13/00Resistors not provided for elsewhere
    • H01C13/02Structural combinations of resistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/209Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only resistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5445Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE112022004933.2T 2021-11-12 2022-10-19 Halbleitervorrichtung Pending DE112022004933T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021-184533 2021-11-12
JP2021184533 2021-11-12
PCT/JP2022/038987 WO2023085026A1 (ja) 2021-11-12 2022-10-19 半導体装置

Publications (1)

Publication Number Publication Date
DE112022004933T5 true DE112022004933T5 (de) 2024-08-22

Family

ID=86335619

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112022004933.2T Pending DE112022004933T5 (de) 2021-11-12 2022-10-19 Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US20240296980A1 (https=)
JP (1) JPWO2023085026A1 (https=)
CN (1) CN118235246A (https=)
DE (1) DE112022004933T5 (https=)
WO (1) WO2023085026A1 (https=)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021184533A (ja) 2020-05-21 2021-12-02 キヤノン株式会社 情報処理装置、情報処理方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04346519A (ja) * 1991-05-24 1992-12-02 Fujitsu Ltd 半導体集積回路装置
JPH065788A (ja) * 1992-06-19 1994-01-14 Nec Corp 半導体装置
JP2003258642A (ja) * 2002-03-05 2003-09-12 Matsushita Electric Ind Co Ltd Da変換器
JP2011204925A (ja) * 2010-03-25 2011-10-13 Seiko Instruments Inc 半導体装置
JP2014220491A (ja) * 2013-04-09 2014-11-20 富士電機株式会社 薄膜抵抗体群およびそれを内蔵した多層配線基板
JP6541223B2 (ja) * 2015-01-16 2019-07-10 新日本無線株式会社 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021184533A (ja) 2020-05-21 2021-12-02 キヤノン株式会社 情報処理装置、情報処理方法

Also Published As

Publication number Publication date
JPWO2023085026A1 (https=) 2023-05-19
WO2023085026A1 (ja) 2023-05-19
CN118235246A (zh) 2024-06-21
US20240296980A1 (en) 2024-09-05

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Legal Events

Date Code Title Description
R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0027010000

Ipc: H10D0086850000